High speed and ultra low voltage CMOS latch.

Yngvar Berg Omid Mirmotahari Snorre Aunet

Published in: ICECS (2008)

Keyphrases

high speed
low voltage
low power
cmos technology
power line
random access memory
power dissipation
real time
digital signal processing
frame rate
image sensor
mixed signal
design considerations
power consumption
power management
cost effective
flip flops
leakage current