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Novel high-speed dynamic differential ultra low voltage logic for supply-voltage below 300 mV.
Omid Mirmotahari
Ali Dadashi
Mehdi Azadmehr
Yngvar Berg
Published in:
ICECS (2015)
Keyphrases
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high speed
low voltage
low power
random access memory
real time
design considerations
cmos technology
power line
image enhancement
model checking
embedded systems