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Novel ultra low-voltage and high speed domino CMOS logic.
Yngvar Berg
Published in:
VLSI-SoC (2010)
Keyphrases
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high speed
low voltage
random access memory
low power
cmos technology
power line
design considerations
real time
power management
delay insensitive
digital circuits
focal plane
digital signal processing
multi valued
frame rate
learning styles
computer vision