A low-power SRAM using bit-line charge-recycling technique.
Keejong KimHamid MahmoodiKaushik RoyPublished in: ISLPED (2007)
Keyphrases
- low power
- power consumption
- low cost
- high speed
- single chip
- high power
- digital signal processing
- random access memory
- wireless transmission
- low power consumption
- power reduction
- cmos technology
- vlsi circuits
- vlsi architecture
- mixed signal
- power management
- signal processor
- logic circuits
- power saving
- delay insensitive
- power dissipation
- real time