Hardware architecture and VLSI implementation of a low-power high-performance polyphase channelizer with applications to subband adaptive filtering.
Yongtao WangHamid MahmoodiLih-Yih ChiouHunsoo ChooJongsun ParkWoopyo JeongKaushik RoyPublished in: ICASSP (5) (2004)
Keyphrases
- vlsi implementation
- filter bank
- low power
- adaptive filtering
- subband
- power consumption
- low cost
- high speed
- multiresolution
- image compression
- wavelet transform
- fir filters
- bit rate
- wavelet coefficients
- hardware implementation
- feature vectors
- frequency domain
- high frequency
- low pass
- wavelet domain
- discrete wavelet transform
- wavelet packet
- field programmable gate array
- denoising
- signal processing
- lifting scheme
- filtering method
- rate distortion
- speech signal
- real time
- low bit rate
- digital images
- associative memory
- pattern recognition
- wavelet filters
- multiscale
- feature extraction