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Silicon validation of LUT-based logic-locked IP cores.

Gaurav KolheTyler SheavesKevin Immanuel GubbiTejas KadaleSetareh RafatiradSai Manoj PDAvesta SasanHamid MahmoodiHouman Homayoun
Published in: DAC (2022)
Keyphrases
  • low cost
  • classical logic
  • high speed
  • multi valued
  • logic programming
  • proof theory
  • real time
  • high density
  • lookup table
  • model validation