Linda Milor

Publication Activity (10 Years)

Years Active: 1990-2022
Publications (10 Years): 30

Top Topics

Experimental Designs

Reliability Analysis

Random Access Memory

Gate Dielectrics

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

Microelectron. Reliab.

Publications

Rui Zhang, Taizhi Liu, Kexin Yang, Linda Milor
CacheEM: For Reliability Analysis on Cache Memory Aging Due to Electromigration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (9) (2022)
Rui Zhang, Kexin Yang, Zhaocheng Liu, Taizhi Liu, Wenshan Cai, Linda Milor
A Comprehensive Framework for Analysis of Time-Dependent Performance-Reliability Degradation of SRAM Cache Memory. IEEE Trans. Very Large Scale Integr. Syst. 29 (5) (2021)
Yi-Da Wu, Kexin Yang, Shu-Han Hsu, Linda Milor
Optimal Accelerated Test Framework for Time-Dependent Dielectric Breakdown Lifetime Parameter Estimation. IEEE Trans. Very Large Scale Integr. Syst. 28 (12) (2020)
Rui Zhang, Zhaocheng Liu, Kexin Yang, Taizhi Liu, Wenshan Cai, Linda Milor
Inverse Design of FinFET SRAM Cells. IRPS (2020)
Rui Zhang, Taizhi Liu, Kexin Yang, Chang-Chih Chen, Linda Milor
SRAM Stability Analysis and Performance-Reliability Tradeoff for Different Cache Configurations. IEEE Trans. Very Large Scale Integr. Syst. 28 (3) (2020)
Shu-Han Hsu, Ying-Yuan Huang, Kexin Yang, Linda Milor
Identification of Failure Modes for Circuit Samples with Confounded Causes of Failure. IOLTS (2019)
Shu-Han Hsu, Kexin Yang, Linda Milor
Machine Learning for Detection of Competing Wearout Mechanisms. IRPS (2019)
Shu-Han Hsu, Kexin Yang, Linda Milor
Reliability and Accelerated Testing of 14nm FinFET Ring Oscillators. DCIS (2019)
Dae-Hyun Kim, Shu-Han Hsu, Linda Milor
Optimization of Experimental Designs for System- Level Accelerated Life Test in a Memory System Degraded by Time-Dependent Dielectric Breakdown. IEEE Trans. Very Large Scale Integr. Syst. 27 (7) (2019)
Rui Zhang, Kexin Yang, Taizhi Liu, Linda Milor
Impact of Front-End Wearout Mechanisms on the Performance of a Ring Oscillator-Based Thermal Sensor. IWASI (2019)
Rui Zhang, Kexin Yang, Taizhi Liu, Linda Milor
Estimation of the Optimal Accelerated Test Region for FinFET SRAMs Degraded by Front-End and Back-End Wearout Mechanisms. DCIS (2018)
Kexin Yang, Taizhi Liu, Rui Zhang, Linda Milor
Circuit-level reliability simulator for front-end-of-line and middle-of-line time-dependent dielectric breakdown in FinFET technology. VTS (2018)
Taizhi Liu, Chang-Chih Chen, Linda Milor
Comprehensive Reliability-Aware Statistical Timing Analysis Using a Unified Gate-Delay Model for Microprocessors. IEEE Trans. Emerg. Top. Comput. 6 (2) (2018)
Kexin Yang, Taizhi Liu, Rui Zhang, Linda Milor
A Comprehensive Time-Dependent Dielectric Breakdown Lifetime Simulator for Both Traditional CMOS and FinFET Technology. IEEE Trans. Very Large Scale Integr. Syst. 26 (11) (2018)
Kexin Yang, Rui Zhang, Taizhi Liu, Dae Hyun Kim, Linda Milor
Optimal Accelerated Test Regions for Time- Dependent Dielectric Breakdown Lifetime Parameters Estimation in FinFET Technology. DCIS (2018)
Dae-Hyun Kim, Linda Milor
An ECC-Assisted Postpackage Repair Methodology in Main Memory Systems. IEEE Trans. Very Large Scale Integr. Syst. 25 (7) (2017)
Soonyoung Cha, Linda Milor
Adaptive supply voltage and duty cycle controller for yield-power optimization of ICs. IWASI (2017)
Rui Zhang, Taizhi Liu, Kexin Yang, Linda Milor
Analysis of time-dependent dielectric breakdown induced aging of SRAM cache with different configurations. Microelectron. Reliab. (2017)
Woongrae Kim, Taizhi Liu, Linda Milor
On-line monitoring of system health using on-chip SRAMs as a wearout sensor. IOLTS (2017)
Kexin Yang, Taizhi Liu, Rui Zhang, Dae Hyun Kim, Linda Milor
Front-end of line and middle-of-line time-dependent dielectric breakdown reliability simulator for logic circuits. Microelectron. Reliab. (2017)
Soonyoung Cha, Taizhi Liu, Linda Milor
Negative Bias Temperature Instability and Gate Oxide Breakdown Modeling in Circuits With Die-to-Die Calibration Through Power Supply and Ground Signal Measurements. IEEE Trans. Very Large Scale Integr. Syst. 25 (8) (2017)
Dae-Hyun Kim, Linda Milor
Analysis of errors in estimating wearout characteristics of time-dependent dielectric breakdown using system-level accelerated life test. Microelectron. Reliab. (2017)
Dae-Hyun Kim, Linda Milor
A methodology for estimating memory lifetime using a system-level accelerated life test and error-correcting codes. VTS (2017)
Chang-Chih Chen, Taizhi Liu, Linda Milor
System-Level Modeling of Microprocessor Reliability Degradation Due to Bias Temperature Instability and Hot Carrier Injection. IEEE Trans. Very Large Scale Integr. Syst. 24 (8) (2016)
Woongrae Kim, Chang-Chih Chen, Dae Hyun Kim, Linda Milor
Built-In Self-Test Methodology With Statistical Analysis for Electrical Diagnosis of Wearout in a Static Random Access Memory Array. IEEE Trans. Very Large Scale Integr. Syst. 24 (7) (2016)
Taizhi Liu, Chang-Chih Chen, Soonyoung Cha, Linda Milor
System-level variation-aware aging simulator using a unified novel gate-delay model for bias temperature instability, hot carrier injection, and gate oxide breakdown. Microelectron. Reliab. 55 (9-10) (2015)
Woongrae Kim, Chang-Chih Chen, Taizhi Liu, Soonyoung Cha, Linda Milor
Estimation of remaining life using embedded SRAM for wearout parameter extraction. IWASI (2015)
Sule Ozev, Linda Milor
Panel: Analog/RF BIST: Are we there yet? VTS (2015)
Woongrae Kim, Chang-Chih Chen, Soonyoung Cha, Linda Milor
MBIST and statistical hypothesis test for time dependent dielectric breakdowns due to GOBD vs. BTDDB in an SRAM array. VTS (2015)
Taizhi Liu, Chang-Chih Chen, Woongrae Kim, Linda Milor
Comprehensive reliability and aging analysis on SRAMs within microprocessor systems. Microelectron. Reliab. 55 (9-10) (2015)
Muhammad Muqarrab Bashir, Chang-Chih Chen, Linda Milor, Dae Hyun Kim, Sung Kyu Lim
Backend Dielectric Reliability Full Chip Simulator. IEEE Trans. Very Large Scale Integr. Syst. 22 (8) (2014)
Woongrae Kim, Linda Milor
Built-in self test methodology for diagnosis of backend wearout mechanisms in SRAM cells. VTS (2014)
Zhengliang Lv, Shiyuan Yang, Hong Wang, Linda Milor
A Delay Evaluation Circuit for Analog BIST Function. IEICE Trans. Electron. (3) (2013)
Chang-Chih Chen, Linda Milor
System-level modeling and microprocessor reliability analysis for backend wearout mechanisms. DATE (2013)
Chang-Chih Chen, Linda Milor
System-level modeling and reliability analysis of microprocessor systems. IWASI (2013)
Chang-Chih Chen, Fahad Ahmed, Linda Milor
Impact of NBTI/PBTIon SRAMs within microprocessor systems: Modeling, simulation, and analysis. Microelectron. Reliab. 53 (9-11) (2013)
Fahad Ahmed, Mohamed M. Sabry, David Atienza, Linda Milor
Wearout-aware compiler-directed register assignment for embedded systems. ISQED (2012)
Zhengliang Lv, Linda Milor, Shiyuan Yang
Impact of NBTI on analog components. ETS (2012)
Fahad Ahmed, Linda Milor
Analysis and On-Chip Monitoring of Gate Oxide Breakdown in SRAM Cells. IEEE Trans. Very Large Scale Integr. Syst. 20 (5) (2012)
Chang-Chih Chen, Fahad Ahmed, Dae Hyun Kim, Sung Kyu Lim, Linda Milor
Backend dielectric reliability simulator for microprocessor system. Microelectron. Reliab. 52 (9-10) (2012)
Chang-Chih Chen, Fahad Ahmed, Linda Milor
A comparative study of wearout mechanisms in state-of-art microprocessors. ICCD (2012)
Muhammad Bashir, Linda Milor, Dae Hyun Kim, Sung Kyu Lim
Impact of irregular geometries on low-k dielectric breakdown. Microelectron. Reliab. 51 (9-11) (2011)
Fahad Ahmed, Linda Milor
Reliable cache design with on-chip monitoring of NBTI degradation in SRAM cells using BIST. VTS (2010)
Fahad Ahmed, Linda Milor
Via wearout detection with on-chip monitors. Microelectron. J. 41 (11) (2010)
Muhammad Bashir, Linda Milor
Modeling Low-k Dielectric Breakdown to Determine Lifetime Requirements. IEEE Des. Test Comput. 26 (6) (2009)
Cheng Jia, Linda Milor
A DLL Design for Testing I/O Setup and Hold Times. IEEE Trans. Very Large Scale Integr. Syst. 17 (11) (2009)
Linda Milor, Changsoo Hong
Backend dielectric breakdown dependence on linewidth and pattern density. Microelectron. Reliab. 47 (9-11) (2007)
Changsoo Hong, Linda Milor
Modeling of the breakdown mechanisms for porous copper/low-k process flows. Microelectron. Reliab. 47 (9-11) (2007)
Changsoo Hong, Linda Milor, M. Z. Lin
Analysis of the layout impact on electric fields in interconnect structures using finite element method. Microelectron. Reliab. 44 (9-11) (2004)
Michael Orshansky, Linda Milor, Pinhong Chen, Kurt Keutzer, Chenming Hu
Impact of spatial intrachip gate length variability on theperformance of high-speed digital circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21 (5) (2002)
Michael Orshansky, Linda Milor, Pinhong Chen, Kurt Keutzer, Chenming Hu
Impact of Systematic Spatial Intra-Chip Gate Length Variability on Performance of High-Speed Digital Circuits. ICCAD (2000)
Linda Milor, Alberto L. Sangiovanni-Vincentelli
Computing Parametric Yield Accurately and Efficiently. ICCAD (1990)
Linda Milor, Alberto L. Sangiovanni-Vincentelli
Optimal Test Set Design for Analog Circuits. ICCAD (1990)