Login / Signup
Impact of Systematic Spatial Intra-Chip Gate Length Variability on Performance of High-Speed Digital Circuits.
Michael Orshansky
Linda Milor
Pinhong Chen
Kurt Keutzer
Chenming Hu
Published in:
ICCAD (2000)
Keyphrases
</>
high speed
digital circuits
evolvable hardware
circuit design
low power
shift register
spatial data
spatio temporal
data flow
spatial information
model based diagnosis
high speed networks
cmos technology
nm technology
mixed signal
spatial and temporal
frame rate
real time
focal plane
finite state machines
databases