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Built-In Self-Test Methodology With Statistical Analysis for Electrical Diagnosis of Wearout in a Static Random Access Memory Array.
Woongrae Kim
Chang-Chih Chen
Dae Hyun Kim
Linda Milor
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2016)
Keyphrases
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random access memory
low voltage
statistical analysis
design considerations
embedded dram
real time
object oriented
design methodology
integrated circuit
cmos technology
built in self test