Impact of spatial intrachip gate length variability on theperformance of high-speed digital circuits.
Michael OrshanskyLinda MilorPinhong ChenKurt KeutzerChenming HuPublished in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2002)
Keyphrases
- digital circuits
- high speed
- evolvable hardware
- spatial data
- data flow
- finite state machines
- spatial information
- spatial and temporal
- shift register
- model based diagnosis
- low power
- spatial reasoning
- functional decomposition
- spatial distribution
- circuit design
- spatio temporal
- space time
- real time
- boolean functions
- frame rate
- pattern matching
- cmos technology
- cooperative
- high speed networks