Takeshi Ohkawa

Publication Activity (10 Years)

Years Active: 2004-2024
Publications (10 Years): 39

Top Topics

Oriented Programming

Cellular Automata

Parallel Processing

Runtime Environment

Top Venues

IEICE Trans. Inf. Syst.

Publications

Takeshi Ohkawa, Kenta Arai, Kanemitsu Ootsu, Takashi Yokota
Alchemist: A Component-Oriented Development Tool of FPGA based on Publish/Subscribe Model. ICCE (2024)
Kenji Hisazumi, Takeshi Ohkawa, Masafumi Miwa, Mikiko Sato, Takashi Nagai, Nobuhiro Ohe, Kittikhun Thongpull, Nattha Jindapetch, Harumi Watanabe
APRIS Robot Challenge: Collaborative Online Interdisciplinary and International Learning for IoT/Robotics Systems. EDUCON (2024)
Takeshi Ohkawa, Masahiro Aoyagi
FPGA Emulation of Through-Silicon-Via (TSV) Dataflow Network for 3D Standard Chip Stacking System. COOL CHIPS (2023)
Hayato Mori, Eisuke Okazaki, Gai Nagahashi, Mikiko Sato, Takeshi Ohkawa, Midori Sugaya
Offloading Image Recognition Processing for Care Robots to FPGA on Multi-access Edge Computing. ICFPT (2023)
Masato Fukui, Yoichi Ishiwata, Takeshi Ohkawa, Midori Sugaya
IoT Edge Server ROS Node Allocation Method for Multi-SLAM on Many-core. PerCom Workshops (2022)
Hayato Mori, Hayato Amano, Akinobu Mizutani, Eisuke Okazaki, Yuki Konno, Kohei Sada, Tomohiro Ono, Yuma Yoshimoto, Hakaru Tamukoh, Takeshi Ohkawa, Midori Sugaya
Desgin and Implementation of ROS2-based Autonomous Tiny Robot Car with Integration of Multiple ROS2 FPGA Nodes. FPT (2022)
Ludi Wang, Takeshi Ohkawa
FPGA-Based Control of Remote Robotic Hands and ROS2 Integration. CANDARW (2022)
Koki Higashi, Yoichi Ishiwata, Takeshi Ohkawa, Midori Sugaya
Fogcached-Ros: DRAM/NVMM Hybrid KVS Server with ROS Based Extension for ROS Application and SLAM Evaluation. IEICE Trans. Inf. Syst. (12) (2021)
Hayato Amano, Hayato Mori, Akinobu Mizutani, Tomohiro Ono, Yuma Yoshimoto, Takeshi Ohkawa, Hakaru Tamukoh
A dataset generation for object recognition and a tool for generating ROS2 FPGA node. FPT (2021)
Chinatsu Yamamoto, Ikuta Tanigawa, Kenji Hisazumi, Mikiko Sato, Takeshi Ohkawa, Nobuhiko Ogura, Harumi Watanabe
Layer Modeling and Its Code Generation based on Context-oriented Programming. MODELSWARD (2021)
Sannomiya Natsuho, Takeshi Ohkawa, Hideharu Amano, Midori Sugaya
Power Consumption Reduction Method and Edge Offload Server for Multiple Robots. EDGE (2021)
Takashi Yokota, Kanemitsu Ootsu, Takeshi Ohkawa
Genetic Node-Mapping Methods for Rapid Collective Communications. IEICE Trans. Inf. Syst. (1) (2020)
Daniel Pinheiro Leal, Midori Sugaya, Hideharu Amano, Takeshi Ohkawa
FPGA Acceleration of ROS2-Based Reinforcement Learning Agents. CANDAR (Workshops) (2020)
Daniel Pinheiro Leal, Midori Sugaya, Hideharu Amano, Takeshi Ohkawa
Automated Integration of High-Level Synthesis FPGA Modules with ROS2 Systems. FPT (2020)
Takeshi Ohkawa, Shotaro Tayama, Hayato Mori, Dohyung Lee, Hayato Amano, Itsuki Hirakawa, Mikiko Sato, Harumi Watanabe
Design and Development of Networked Multiple FPGA Components for Autonomous Tiny Robot Car. FPT (2019)
Takeshi Ohkawa, Ikuta Tanigawa, Mikiko Sato, Kenji Hisazumi, Nobuhiko Ogura, Harumi Watanabe
Prototype of FPGA Dynamic Reconfiguration Based-on Context-Oriented Programming. MCSoC (2019)
Takeshi Ohkawa, Kazushi Yamashina, Takuya Matsumoto, Kanemitsu Ootsu, Takashi Yokota
Automatic Generation Tool of FPGA Components for Robots. IEICE Trans. Inf. Syst. (5) (2019)
Takeshi Ohkawa, Yuhei Sugata, Harumi Watanabe, Nobuhiko Ogura, Kanemitsu Ootsu, Takashi Yokota
High level synthesis of ROS protocol interpretation and communication circuit for FPGA. RoSE@ICSE (2019)
Takanobu Baba, Shinpei Watanabe, Boaz Jessie Jackin, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota, Yoshio Hayasaki, Toyohiko Yatagai
Fast Computation with Efficient Object Data Distribution for Large-Scale Hologram Generation on a Multi-GPU Cluster. IEICE Trans. Inf. Syst. (7) (2019)
Kengo Jingu, Kohta Shigenobu, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota
Directive-Based Parallelization of For-Loops at LLVM IR Level. SNPD (2019)
Masahiro Nissato, Hiroki Sugiyama, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota
Realization and Preliminary Evaluation of MPI Runtime Environment on Android Cluster. AINA (2019)
Takashi Yokota, Kanemitsu Ootsu, Takeshi Ohkawa
Accelerating Large-Scale Interconnection Network Simulation by Cellular Automata Concept. IEICE Trans. Inf. Syst. (1) (2019)
Takanobu Baba, Shinpei Watanabe, Boaz Jessie Jackin, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota, Yoshio Hayasaki, Toyohiko Yatagai
Data Distribution Method for Fast Giga-scale Hologram Generation on a Multi-GPU Cluster. ApPLIED@PODC (2018)
Takashi Yokota, Kanemitsu Ootsu, Takeshi Ohkawa
A Genetic Approach for Accelerating Communication Performance by Node Mapping. IEICE Trans. Inf. Syst. (12) (2018)
Takanobu Baba, Shinpei Watanabe, Boaz Jessie Jackin, Takeshi Ohkawa, Kanemitsu Ootsu, Takashi Yokota, Yoshio Hayasaki, Toyohiko Yatagai
Overcoming the difficulty of large-scale CGH generation on multi-GPU cluster. GPGPU@PPoPP (2018)
Hiromichi Wakatsuki, Takao Kido, Kenta Arai, Yuhei Sugata, Kanemitsu Ootsu, Takashi Yokota, Takeshi Ohkawa
Development of a Robot Car by Single Line Search Method for White Line Detection with FPGA. FPT (2018)
Takeshi Ohkawa, Kazushi Yamashina, Hitomi Kimura, Kanemitsu Ootsu, Takashi Yokota
FPGA Components for Integrating FPGAs into Robot Systems. IEICE Trans. Inf. Syst. (2) (2018)
Kengo Jingu, Kohta Shigenobu, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota
An Implementation of LLVM Pass for Loop Parallelization Based on IR-Level Directives. CANDAR Workshops (2018)
Shinpei Watanabe, Boaz Jessie Jackin, Takeshi Ohkawa, Kanemitsu Ootsu, Takashi Yokota, Yoshio Hayasaki, Toyohiko Yatagai, Takanobu Baba
Acceleration of Large-Scale CGH Generation Using Multi-GPU Cluster. CANDAR (2017)
Kohta Shigenobu, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota
A Translation Method of ARM Machine Code to LLVM-IR for Binary Code Parallelization and Optimization. CANDAR (2017)
Takashi Yokota, Kanemitsu Ootsu, Takeshi Ohkawa
A Static Packet Scheduling Approach for Fast Collective Communication by Using PSO. IEICE Trans. Inf. Syst. (12) (2017)
Takeshi Ohkawa, Kanemitsu Ootsu, Takashi Yokota, Katsuya Kikuchi, Masahiro Aoyagi
Designing Efficient Parallel Processing in 3D Standard-Chip Stacking System with Standard Bus. MCSoC (2017)
Yuki Sawada, Yusuke Arai, Kanemitsu Ootsu, Takashi Yokota, Takeshi Ohkawa
Performance of Android Cluster System Allowing Dynamic Node Reconfiguration. Wirel. Pers. Commun. 93 (4) (2017)
Takashi Yokota, Kanemitsu Ootsu, Takeshi Ohkawa
Large-Scale Interconnection Network Simulation Methods Based on Cellular Automata. CANDAR (2017)
Yuhei Sugata, Takeshi Ohkawa, Kanemitsu Ootsu, Takashi Yokota
Acceleration of Publish/Subscribe Messaging in ROS-compliant FPGA Component. HEART (2017)
Kazushi Yamashina, Hitomi Kimura, Takeshi Ohkawa, Kanemitsu Ootsu, Takashi Yokota
cReComp: Automated Design Tool for ROS-Compliant FPGA Component. MCSoC (2016)
Takashi Yokota, Kanemitsu Ootsu, Takeshi Ohkawa
Enhancing Entropy Throttling: New Classes of Injection Control in Interconnection Networks. IEICE Trans. Inf. Syst. (12) (2016)
Takeshi Ohkawa, Kazushi Yamashina, Takuya Matsumoto, Kanemitsu Ootsu, Takashi Yokota
Architecture exploration of intelligent robot system using ros-compliant FPGA component. RSP (2016)
Takashi Yokota, Kanemitsu Ootsu, Takeshi Ohkawa
Introducing PSO for Optimal Packet Scheduling of Collective Communication. CANDAR (2016)
Kanemitsu Ootsu, Yutaka Matsuno, Takeshi Ohkawa, Takashi Yokota, Takanobu Baba
Empirical performance study of speculative parallel processing on commercial multi-core CPU with hardware transactional memory. SEPS@SPLASH (2015)
Yuki Sawada, Yusuke Arai, Kanemitsu Ootsu, Takashi Yokota, Takeshi Ohkawa
An Android cluster system capable of dynamic node reconfiguration. ICUFN (2015)
Hiroyuki Obuchi, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota
Efficient Translation and Execution Method for Automated Parallel Processing System by Using Valgrind. CANDAR (2015)
Kazushi Yamashina, Takeshi Ohkawa, Kanemitsu Ootsu, Takashi Yokota
Proposal of ROS-compliant FPGA Component for Low-Power Robotic Systems. CoRR (2015)
Takashi Yokota, Kanemitsu Ootsu, Takeshi Ohkawa
Entropy Throttling: Towards Global Congestion Control of Interconnection Networks. CANDAR (2015)
Kosuke Hiraishi, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota
Proposal of Highly Efficient Memory Access Method Using Locked-Cache on Soft-Core Processor with SIMD Operations. CANDAR (2015)
Yuki Suzuki, Takashi Yokota, Kanemitsu Ootsu, Takeshi Ohkawa
Performance Improvement of Large-Scale Interconnection Network Simulator by Using GPU. CANDAR (2015)
Takashi Yokota, Kanemitsu Ootsu, Takeshi Ohkawa
Relaxing Heavy Congestion by State Propagation. J. Inf. Process. 23 (5) (2015)
Takeshi Ohkawa, Takashi Yokota, Kanemitsu Ootsu
A prototyping system for hardware distributed objects with diversity of programming languages design and preliminary evaluation. FPT (2013)
Hiroyoshi Jutori, Takanobu Baba, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota
Exploration of Highly Accurate Path Prediction Mechanism Using Detailed Path History. CANDAR (2013)
Takayuki Hoshi, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota
Runtime Overhead Reduction in Automated Parallel Processing System Using Valgrind. CANDAR (2013)
Masayuki Omote, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota
Efficient Data Communication Using Dynamic Switching of Compression Method. CANDAR (2013)
Takeshi Ohkawa, Daichi Uetake, Takashi Yokota, Kanemitsu Ootsu, Takanobu Baba
Reconfigurable and hardwired ORB engine on FPGA by Java-to-HDL synthesizer for realtime application. SIGARCH Comput. Archit. News 41 (5) (2013)
Takashi Yokota, Kanemitsu Ootsu, Takeshi Ohkawa
A Cellular Automata Approach for Large-Scale Interconnection Network Simulation. CANDAR (2013)
Kazuhiro Kinkai, Takanobu Baba, Hiroyoshi Jutori, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota
Comparative Study of Path Prediction Method for Speculative Loop Execution. ICNC (2012)
Atsushi Shina, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota, Takanobu Baba
Proposal of Incremental Software Simulation for Reduction of Evaluation Time. ICNC (2012)
Marco Chacin, Hiroyuki Uchida, Michiya Hagimoto, Takashi Miyazaki, Takeshi Ohkawa, Rimon Ikeno, Yukoh Matsumoto, Fumito Imura, Motohiro Suzuki, Katsuya Kikuchi, Hiroshi Nakagawa, Masahiro Aoyagi
COOL interconnect low power interconnection technology for scalable 3D LSI design. COOL Chips (2011)
Koichi Ono, Takeshi Ohkawa, Masahiro Segami, Masao Hotta
A Cascaded Folding ADC Based on Fast-Settling 3-Degree Folders with Enhanced Reset Technique. IEICE Trans. Electron. (3) (2010)
Takeshi Ohkawa, Toshiyuki Nozawa, Masanori Fujibayashi, Naoto Miyamoto, Leo Karnan, Soichiro Kita, Koji Kotani, Tadahiro Ohmi
The flexible processor an approach for single-chip hardware emulation by dynamic reconfiguration. ASP-DAC (2004)
Md. Ashfaquzzaman Khan, Naoto Miyamoto, Takeshi Ohkawa, Amir Jamak, Soichiro Kita, Koji Kotani, Tadahiro Ohmi
An approach to realize time-sharing of flip-flops in time-multiplexed FPGAs. FPT (2004)