Takanobu Baba

Publication Activity (10 Years)

Years Active: 1977-2019
Publications (10 Years): 5

Top Topics

Generation Method

Data Distribution

Capable Of Producing

Top Venues

IEICE Trans. Inf. Syst.

Publications

Takanobu Baba, Shinpei Watanabe, Boaz Jessie Jackin, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota, Yoshio Hayasaki, Toyohiko Yatagai
Fast Computation with Efficient Object Data Distribution for Large-Scale Hologram Generation on a Multi-GPU Cluster. IEICE Trans. Inf. Syst. (7) (2019)
Takanobu Baba, Shinpei Watanabe, Boaz Jessie Jackin, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota, Yoshio Hayasaki, Toyohiko Yatagai
Data Distribution Method for Fast Giga-scale Hologram Generation on a Multi-GPU Cluster. ApPLIED@PODC (2018)
Takanobu Baba, Shinpei Watanabe, Boaz Jessie Jackin, Takeshi Ohkawa, Kanemitsu Ootsu, Takashi Yokota, Yoshio Hayasaki, Toyohiko Yatagai
Overcoming the difficulty of large-scale CGH generation on multi-GPU cluster. GPGPU@PPoPP (2018)
Shinpei Watanabe, Boaz Jessie Jackin, Takeshi Ohkawa, Kanemitsu Ootsu, Takashi Yokota, Yoshio Hayasaki, Toyohiko Yatagai, Takanobu Baba
Acceleration of Large-Scale CGH Generation Using Multi-GPU Cluster. CANDAR (2017)
Kanemitsu Ootsu, Yutaka Matsuno, Takeshi Ohkawa, Takashi Yokota, Takanobu Baba
Empirical performance study of speculative parallel processing on commercial multi-core CPU with hardware transactional memory. SEPS@SPLASH (2015)
Yuanming Zhang, Gang Xiao, Takanobu Baba
Accelerating sequential programs on commodity multi-core processors. J. Parallel Distributed Comput. 74 (4) (2014)
Hiroyoshi Jutori, Takanobu Baba, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota
Exploration of Highly Accurate Path Prediction Mechanism Using Detailed Path History. CANDAR (2013)
Yuanming Zhang, Kanemitsu Ootsu, Takashi Yokota, Takanobu Baba
An automatic thread decomposition approach for pipelined multithreading. Int. J. High Perform. Comput. Netw. 7 (3) (2013)
Takeshi Ohkawa, Daichi Uetake, Takashi Yokota, Kanemitsu Ootsu, Takanobu Baba
Reconfigurable and hardwired ORB engine on FPGA by Java-to-HDL synthesizer for realtime application. SIGARCH Comput. Archit. News 41 (5) (2013)
Kazuhiro Kinkai, Takanobu Baba, Hiroyoshi Jutori, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota
Comparative Study of Path Prediction Method for Speculative Loop Execution. ICNC (2012)
Atsushi Shina, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota, Takanobu Baba
Proposal of Incremental Software Simulation for Reduction of Evaluation Time. ICNC (2012)
Takashi Yokota, Kanemitsu Ootsu, Takanobu Baba
Steady/Unsteady Communication Performance in Large-Scale Regular Networks. AINA Workshops (2011)
Kanemitsu Ootsu, Takeshi Abe, Takashi Yokota, Takanobu Baba
Loop Performance Improvement for Min-cut Program Decomposition Method. ICNC (2010)
Yuanming Zhang, Kanemitsu Ootsu, Takashi Yokota, Takanobu Baba
Automatic Thread Decomposition for Pipelined Multithreading. ICPADS (2010)
Takashi Yokota, Kanemitsu Ootsu, Takanobu Baba
An Effective Throttling Method Based on Quasi-global Congestion Information. ISPAN (2009)
Yuanming Zhang, Kanemitsu Ootsu, Takashi Yokota, Takanobu Baba
Clustered Software Queue for Efficient Pipelined Multithreading. PDCAT (2009)
Takashi Yokota, Kanemitsu Ootsu, Takanobu Baba
Are Uniform Nerworks Scalable? PDCAT (2008)
Yuanming Zhang, Kanemitsu Ootsu, Takashi Yokota, Takanobu Baba
Clustered Decoupled Software Pipelining on Commodity CMP. ICPADS (2008)
Takashi Yokota, Kanemitsu Ootsu, Takanobu Baba
Potentials of Branch Predictors: From Entropy Viewpoints. ARCS (2008)
Takashi Yokota, Kanemitsu Ootsu, Takanobu Baba
Introducing entropies for representing program behavior and branch predictor performance. Experimental Computer Science (2007)
Kanemitsu Ootsu, Takahiko Kobayashi, Takashi Yokota, Takanobu Baba
A thread partitioning technique for multithreaded execution along hot paths. Parallel and Distributed Computing and Networks (2007)
Takashi Yokota, Kanemitsu Ootsu, Fumihito Furukawa, Takanobu Baba
Entropy Throttling: A Physical Approach for Maximizing Packet Mobility in Interconnection Networks. Asia-Pacific Computer Systems Architecture Conference (2006)
Atsushi Tsukikawa, Fumihito Furukawa, Takayuki Aoki, Daisuke Oka, Kanemitsu Ootsu, Takashi Yokota, Takanobu Baba
Design and Implementation of a VLIW Processor Simulation Environment with Instruction Scheduling Framework. IASTED PDCS (2005)
Takashi Yokota, Moriyuki Saito, Fumihito Furukawa, Kanemitsu Ootsu, Takanobu Baba
Two-Path Limited Speculation Method for Static/Dynamic Optimization in Multithreaded Systems. PDCAT (2005)
Takashi Yokota, Masashi Nishitani, Kanemitsu Ootsu, Fumihito Furukawa, Takanobu Baba
Cross-Line - A Globally Adaptive Control Method of Interconnection Network. ISHPC (2005)
Yoshiyuki Iwamoto, Koichi Suga, Kanemitsu Ootsu, Takashi Yokota, Takanobu Baba
Receiving message prediction method. Parallel Comput. 29 (11-12) (2003)
Takashi Yokota, Masamichi Nagafuchi, Yoshito Mekada, Tsutomu Yoshinaga, Kanemitsu Ootsu, Takanobu Baba
Real-Time Medical Diagnosis on a Multiple FPGA-based System. FPL (2002)
Takashi Yokota, Masamichi Nagafuchi, Yoshito Mekada, Tsutomu Yoshinaga, Kanemitsu Ootsu, Takanobu Baba
A Scalable FPGA-Based Custom Computing Machine for a Medical Image Processing. FCCM (2002)
Kanemitsu Ootsu, Takafumi Ono, Takashi Yokota, Takanobu Baba
A Methodology of Binary-level Multithreading and Its Preliminary Evaluation. IASTED PDCS (2002)
Kanemitsu Ootsu, Tsutomu Yoshinaga, Takanobu Baba
Design and Evaluation of Speculative Multi-threading with Selective Multi-Path Execution. IPDPS (2001)
Takanobu Baba, Tsutomu Yoshinaga, Yoshiyuki Iwamoto, Kanemitsu Ootsu
Design, Implementation and Evaluation of a Parallel Object-Oriented Language A-NETL. Scalable Comput. Pract. Exp. 3 (2) (2000)
Tsutomu Yoshinaga, Masaya Hayashi, Maki Horita, Sayuri Nakamura, Kanemitsu Ootsu, Takanobu Baba
Recover-X: An Adaptive Router with Limited Escape Channels. ICPADS (2000)
Naoki Kohata, Toru Yamaguchi, Takanobu Baba, Hideki Hashimoto
Chaotic Evolutionary Parallel Computation on Intelligent Agents. J. Robotics Mechatronics 10 (5) (1998)
Tsutomu Yoshinaga, Masaya Hayashi, Maki Horita, Y. Yamaguchi, Kanemitsu Ootsu, Takanobu Baba
A Cost and Performance Comparison for Wormhole Routers based on HDL Designs. ICPADS (1998)
Naoki Kohata, Makoto Sato, Toru Yamaguchi, Takanobu Baba, Hideki Hashimoto
Evolutionary Computation for Intelligent Agents Based on Chaotic Retrieval and Soft DNA. SEAL (1998)
Lawrence Mutenda, Manabu Hiyama, Tsutomu Yoshinaga, Takanobu Baba
Parallel Navigation in an A-NETL Based Parallel OODBMS. ISHPC (1997)
Toru Yamaguchi, Naoki Kohata, Yoshiyuki Wakamatsu, Takanobu Baba
Chaotic Evolutionary Processing for Intelligent Agents. ICONIP (1) (1997)
Toru Yamaguchi, Naoki Kohata, Yoshiyuki Wakamatsu, Takanobu Baba
Evolutionary parallel computation on welfare intelligent agent. KES (1) (1997)
Takanobu Baba, Yasushige Furuya, Tsutomu Yoshinaga
Event-based debugging system for a parallel object-oriented language A-NETL. Systems and Computers in Japan 28 (11) (1997)
Tsutomu Yoshinaga, Takanobu Baba
Node processor for a parallel object-oriented total architecture A-NET. Systems and Computers in Japan 27 (10) (1996)
Takanobu Baba, Norihito Saitoh, Takahiro Furuta, Hiroshi Taguchi, Tsutomu Yoshinaga
A Declarative Synchronization Mechanism for Parallel Object-Oriented Computation. IEICE Trans. Inf. Syst. (8) (1995)
Takanobu Baba, Tsutomu Yoshinaga, Takahiro Furuta
Programming and Debugging for Massively Parallelism: The Case for a Parallel Object-Oriented Language A-NETL. OBPDC (1995)
Takanobu Baba
Transactions of the Japan Computer Chess Association (in Japanese). J. Int. Comput. Games Assoc. 17 (4) (1994)
Makoto Amamiya, Masahiko Satoh, Akifumi Makinouchi, Ken-Ichi Hagiwara, Taiichi Yuasa, Hitoshi Aida, Kazunori Ueda, Keijiro Araki, Tetsuo Ida, Takanobu Baba
Research on programming languages for massively parallel processing. ISPAN (1994)
Tsutomu Yoshinaga, Takanobu Baba
A parallel object-oriented language A-NETL and its programming environment. COMPSAC (1991)
Takanobu Baba, Tsutomu Yoshinaga, Tohru Iijima, Yoshifumi Iwamoto, Masahiro Hamada, Mitsuru Suzuki
A parallel object-oriented total architecture: A-NET. SC (1990)
Takanobu Baba, Yoshifumi Iwamoto, Tsutomu Yoshinaga
A network-topology independent task allocation strategy for parallel computers. SC (1990)
Takeshi Kumagai, Takanobu Baba, Hideki Saito
Generating cartesian products of two sets on a shuffle-exchange network. Systems and Computers in Japan 20 (4) (1989)
Hideru Doi, Katsuhiro Yamazaki, Shousaku Ookawa, Takanobu Baba, Kenzo Okuda
Fast processing of an object-oriented language by a low-level parallel computer munap. Systems and Computers in Japan 19 (2) (1988)
Masayuki Inagawa, Takanobu Baba, Katsuhiro Yamazaki, Kenzo Okuda, Ken Ishikawa
Unification parallelism for prolog processing. Systems and Computers in Japan 19 (1) (1988)
Takanobu Baba, Hideki Saito, S. Bing Yao
A Network Algorithm for Relational Database Operations. IWDM (1987)
Takanobu Baba, S. Bing Yao, Alan R. Hevner
Design of a Functionally Distributed, Multiprocessor Database Machine Using Data Flow Analysis. IEEE Trans. Computers 36 (6) (1987)
Takanobu Baba, Hiroshi Minakawa, Kenzo Okuda
A visual microprogramming system. MICRO (1987)
Takumi Ohtani, Takanobu Baba, Masayuki Inagawa, Takao Iwasaki, Kenzo Okuda, Katsuhiro Yamazaki
Data Abstraction Technique for Relational Database Query Processing. Systems and Computers in Japan 17 (2) (1986)
Katsuhiro Yamazaki, Hiroyuki Kanai, Takanobu Baba, Kenzo Okuda
Architectural evaluation of a universal host computer munap. Systems and Computers in Japan 17 (10) (1986)
Katsuhiro Yamazaki, Takanobu Baba, Kenzo Okuda, Hiroyuki Kanai
Architectural Evaluation and Improvement of a Universal Host Computer MUNAP. IFIP Congress (1986)
Takanobu Baba, Shinzi Suzuki, Katsuhiro Yamazaki, Kenzo Okuda, Toshiyuki Sano
Software testing system supported by a computer architecture. Systems and Computers in Japan 17 (10) (1986)
Takanobu Baba, Mitsuru Ikeda, Katsuhiro Yamazaki, Kenzo Okuda
Compaction of two-level microprograms for a multiprocessor computer. MICRO (1984)
Takanobu Baba, Katsuhiro Yamazaki, Nobuyuki Hashimoto, Hiroyuki Kanai, Kenzo Okuda, Kazuhiko Hashimoto
Hierarchical Micro-Architectures of a Two-Level Microprogrammed Multiprocessor Computer. ICPP (1983)
Takanobu Baba, Ken Ishikawa, Kenzo Okuda
A Two-Level Microprogrammed Multiprocessor Computer with Nonnumeric Functions. IEEE Trans. Computers 31 (12) (1982)
Takanobu Baba, Hiroshi Hagiwara
The MPG System: A Machine-Independent Efficient Microprogram Generator. IEEE Trans. Computers 30 (6) (1981)
Takanobu Baba, Ken Ishikawa, Kenzo Okuda, Hiroyuki Kobayashi
MUNAP - A Two-Level Microprogrammed Multiprocessor Architecture for Nonnumeric Processing. IFIP Congress (1980)
Takanobu Baba
A Microprogram Generating System-MPG. IFIP Congress (1977)