FPGA Emulation of Through-Silicon-Via (TSV) Dataflow Network for 3D Standard Chip Stacking System.

Takeshi Ohkawa Masahiro Aoyagi

Published in: COOL CHIPS (2023)

Keyphrases

high speed
low cost
high density
data flow
single chip
high bandwidth
cmos technology
image processing
complex networks
low power consumption
signal processing
low power
field programmable gate array
programmable logic
network on chip