Liyi Xiao

Publication Activity (10 Years)

Years Active: 2001-2024
Publications (10 Years): 58

Top Topics

Highly Reliable

Visual Tracking

Error Correction

Top Venues

Microelectron. Reliab.

IEEE Trans. Very Large Scale Integr. Syst.

Publications

He Liu, Jiaqiang Li, Liyi Xiao, Tianqi Wang, Jie Li
SET-detection low complexity burst error correction codes for SRAM protection. Integr. 98 (2024)
Fangfa Fu, Wenyu Zhang, Zesong Jiang, Zhiyu Zhu, Guoyu Li, Bing Yang, Cheng Liu, Liyi Xiao, Jinxiang Wang, Huawei Li, Xiaowei Li
SigDLA: A Deep Learning Accelerator Extension for Signal Processing. CoRR (2024)
Xiaoqiang Liu, Mingxue Li, Xinkai Chen, Yiheng Zhao, Liyi Xiao, Yufeng Zhang
A Compact RF Energy Harvesting Wireless Sensor Node with an Energy Intensity Adaptive Management Algorithm. Sensors 23 (20) (2023)
Jie Li, Liyi Xiao, Linzhe Li, Hongchen Li, He Liu, Chenxu Wang
A Low-Cost Error-Tolerant Flip-Flop Against SET and SEU for Dependable Designs. IEEE Trans. Circuits Syst. I Regul. Pap. 69 (7) (2022)
Jie Li, Liyi Xiao, Linzhe Li, Hongchen Li, He Liu, Chenxu Wang
A Write-Buffer Scheme to Protect Cache Memories Against Multiple-Bit Errors. IEEE Access 10 (2022)
Linzhe Li, Liyi Xiao, He Liu, Zhigang Mao
Synergistic Effect of BTI and Process Variations on the Soft Error Rate Estimation in Digital Circuits. IEEE Access 10 (2022)
Hongchen Li, Liyi Xiao, Chunhua Qi, Jie Li
Design of High-Reliability Memory Cell to Mitigate Single Event Multiple Node Upsets. IEEE Trans. Circuits Syst. I Regul. Pap. 68 (10) (2021)
Jie Li, Pedro Reviriego, Shanshan Liu, Liyi Xiao, Fabrizio Lombardi
Designs for efficient low power cardinality and similarity sketches by Two-Step Hashing (TSH). Integr. 81 (2021)
Chunhua Qi, Yanqing Zhang, Guoliang Ma, Chaoming Liu, Tianqi Wang, Liyi Xiao, Mingxue Huo, Guofu Zhai
Design of a high-performance 12T SRAM cell for single event upset tolerance. Sci. China Inf. Sci. 64 (11) (2021)
Jiaqiang Li, Pedro Reviriego, Liyi Xiao, Haotian Wu
Protecting Memories against Soft Errors: The Case for Customizable Error Correction Codes. IEEE Trans. Emerg. Top. Comput. 9 (2) (2021)
Pedro Reviriego, Shanshan Liu, Alfonso Sánchez-Macián, Liyi Xiao, Juan Antonio Maestro
Reduction of Parity Overhead in a Subset of Orthogonal Latin Square Codes. DCIS (2020)
Rongsheng Zhang, Liyi Xiao, Jie Li, Xuebing Cao, Linzhe Li
An Adjustable and Fast Error Repair Scrubbing Method Based on Xilinx Essential Bits Technology for SRAM-Based FPGA. IEEE Trans. Reliab. 69 (2) (2020)
Peng Gao, Ruyue Yuan, Fei Wang, Liyi Xiao, Hamido Fujita, Yan Zhang
Siamese attentional keypoint network for high performance visual tracking. Knowl. Based Syst. 193 (2020)
Peng Gao, Qiquan Zhang, Fei Wang, Liyi Xiao, Hamido Fujita, Yan Zhang
Learning reinforced attentional representation for end-to-end visual tracking. Inf. Sci. 517 (2020)
Jie Li, Shanshan Liu, Pedro Reviriego, Liyi Xiao, Fabrizio Lombardi
Scheme for periodical concurrent fault detection in parallel CRC circuits. IET Comput. Digit. Tech. 14 (2) (2020)
Jiaqiang Li, Pedro Reviriego, Costas Argyrides, Liyi Xiao
Efficient Concurrent Error Detection for SEC-DAEC Encoders. IOLTS (2019)
Xuebing Cao, Liyi Xiao, Linzhe Li, Jie Li, Tianqi Wang
Simulation of Proton Induced Single Event Upsets in Bulk Nano-CMOS SRAMs. ICICDT (2019)
Peng Gao, Yipeng Ma, Ruyue Yuan, Liyi Xiao, Fei Wang
Siamese Attentional Keypoint Network for High Performance Visual Tracking. CoRR (2019)
Peng Gao, Qiquan Zhang, Liyi Xiao, Yan Zhang, Fei Wang
Learning Reinforced Attentional Representation for End-to-End Visual Tracking. CoRR (2019)
Mingxue Huo, Guoliang Ma, Bin Zhou, Liyi Xiao, Chunhua Qi, Yanqing Zhang, Jianning Ma, Yinghun Piao, Tianqi Wang
Single-event upset prediction in static random access memory cell account for parameter variations. Sci. China Inf. Sci. 62 (6) (2019)
Shanshan Liu, Pedro Reviriego, Kazuteru Namba, Salvatore Pontarelli, Liyi Xiao, Fabrizio Lombardi
Low Redundancy Double Error Correction Spotty Codes Combined with Gray Coding for 64 Data Bits Memories of 4-bit Multilevel Cells. DFT (2019)
Peng Gao, Yipeng Ma, Ruyue Yuan, Liyi Xiao, Fei Wang
Learning Cascaded Siamese Networks for High Performance Visual Tracking. ICIP (2019)
Jiaqiang Li, Pedro Reviriego, Liyi Xiao
Low Delay 3-Bit Burst Error Correction Codes. J. Electron. Test. 35 (3) (2019)
Hongchen Li, Liyi Xiao, Jie Li, He Liu
Novel High-Performance and Cost Effective Soft Error Hardened Flip-Flop Design for Nanoscale CMOS Technology. ASICON (2019)
Peng Gao, Yipeng Ma, Ruyue Yuan, Liyi Xiao, Fei Wang
Learning Cascaded Siamese Networks for High Performance Visual Tracking. CoRR (2019)
Linzhe Li, Liyi Xiao, Jie Li, He Liu, Zhigang Mao
Synergistic Effect of BTI and Process Variations on Impact and Monitoring of Combination Circuit. ASICON (2019)
Jie Li, Liyi Xiao, Hongchen Li, Lulu Liao, Chenxu Wang
A Radiation Hardened Clock Inverter Cell with High Reliability for Mitigating SET in Clock Network. ASICON (2019)
Xuebing Cao, Liyi Xiao, Jie Li, Rongsheng Zhang, Shanshan Liu, Jinxiang Wang
A Layout-Based Soft Error Vulnerability Estimation Approach for Combinational Circuits Considering Single Event Multiple Transients (SEMTs). IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 (6) (2019)
Jiaqiang Li, Pedro Reviriego, Liyi Xiao, Alexander Klockmann
Protecting Large Word Size Memories against MCUs with 3-bit Burst Error Correction. DFT (2019)
Peng Gao, Yipeng Ma, Ke Song, Chao Li, Fei Wang, Liyi Xiao
Large Margin Structured Convolution Operator for Thermal Infrared Object Tracking. ICPR (2018)
Jing Guo, Lei Zhu, Yu Sun, Huiliang Cao, Hai Huang, Tianqi Wang, Chunhua Qi, Rongsheng Zhang, Xuebing Cao, Liyi Xiao, Zhigang Mao
Design of Area-Efficient and Highly Reliable RHBD 10T Memory Cell for Aerospace Applications. IEEE Trans. Very Large Scale Integr. Syst. 26 (5) (2018)
Peng Gao, Yipeng Ma, Ke Song, Chao Li, Fei Wang, Liyi Xiao
A Complementary Tracking Model with Multiple Features. CoRR (2018)
Rongsheng Zhang, Liyi Xiao, Jie Li, Xuebing Cao, Chunhua Qi, Jiaqiang Li, Mingjiang Wang
A fast fault injection platform of multiple SEUs for SRAM-based FPGAs. Microelectron. Reliab. 82 (2018)
Peng Gao, Yipeng Ma, Ke Song, Chao Li, Fei Wang, Liyi Xiao
Large Margin Structured Convolution Operator for Thermal Infrared Object Tracking. CoRR (2018)
Peng Gao, Yipeng Ma, Ke Song, Chao Li, Fei Wang, Liyi Xiao, Yan Zhang
High performance visual tracking with circular and structural operators. Knowl. Based Syst. 161 (2018)
Xuebing Cao, Liyi Xiao, Linzhe Li, Jie Li, Jiaqiang Li, Jinxiang Wang
Soft error optimization of combinational circuit based on gate sizing and multi-objective particle swarm optimization algorithm. IOLTS (2018)
Jiaqiang Li, Liyi Xiao, Pedro Reviriego, Rongsheng Zhang
Efficient Implementations of 4-Bit Burst Error Correction for Memories. IEEE Trans. Circuits Syst. II Express Briefs (12) (2018)
Peng Gao, Yipeng Ma, Ke Song, Chao Li, Fei Wang, Liyi Xiao, Yan Zhang
High Performance Visual Tracking with Circular and Structural Operators. CoRR (2018)
Jiaqiang Li, Pedro Reviriego, Liyi Xiao, Costas Argyrides, Jie Li
Extending 3-bit Burst Error-Correction Codes With Quadruple Adjacent Error Correction. IEEE Trans. Very Large Scale Integr. Syst. 26 (2) (2018)
Peng Gao, Yipeng Ma, Chao Li, Ke Song, Yan Zhang, Fei Wang, Liyi Xiao
Adaptive Object Tracking with Complementary Models. IEICE Trans. Inf. Syst. (11) (2018)
Shanshan Liu, Pedro Reviriego, Juan Antonio Maestro, Liyi Xiao
Fault tolerant encoders for Single Error Correction and Double Adjacent Error Correction codes. Microelectron. Reliab. 81 (2018)
Liyi Xiao, Anlong Li, Xuebing Cao, Hongchen Li, Rongsheng Zhang, Jie Li, Tianqi Wang
A method to estimate cross-section of circuits at RTL levels. ASICON (2017)
Chunhua Qi, Liyi Xiao, Mingxue Huo, Tianqi Wang, Rongsheng Zhang, Xuebing Cao
A 13T radiation-hardened memory cell for low-voltage operation and ultra-low power space applications. ISQED (2017)
Jing Guo, Lei Zhu, Wenyi Liu, Hai Huang, Shanshan Liu, Tianqi Wang, Liyi Xiao, Zhigang Mao
Novel Radiation-Hardened-by-Design (RHBD) 12T Memory Cell for Aerospace Applications in Nanoscale CMOS Technology. IEEE Trans. Very Large Scale Integr. Syst. 25 (5) (2017)
Pedro Reviriego, Shanshan Liu, Alfonso Sánchez-Macián, Liyi Xiao, Juan Antonio Maestro
A Scheme to Reduce the Number of Parity Check Bits in Orthogonal Latin Square Codes. IEEE Trans. Reliab. 66 (2) (2017)
Shanshan Liu, Pedro Reviriego, Alfonso Sánchez-Macián, Juan Antonio Maestro, Liyi Xiao
Comments on "Extend orthogonal Latin square codes for 32-bit data protection in memory applications" Microelectron. Reliab. 63 278-283 (2016). Microelectron. Reliab. 69 (2017)
Liyi Xiao, Chunhua Qi, Tianqi Wang, Hongchen Li, Jiaqiang Li
Low-cost resilient radiation hardened flip-flop design. ASICON (2017)
Shanshan Liu, Liyi Xiao, Xuebing Cao, Zhigang Mao
Reliability analysis of memories suffering MBUs for the effect of negative bias temperature instability. ASP-DAC (2017)
Shanshan Liu, Pedro Reviriego, Liyi Xiao, Juan Antonio Maestro
A method to recover critical bits under a double error in SEC-DED protected memories. Microelectron. Reliab. 73 (2017)
Shanshan Liu, Liyi Xiao, Jie Li, Yihan Zhou, Zhigang Mao
Low redundancy matrix-based codes for adjacent error correction with parity sharing. ISQED (2017)
Rongsheng Zhang, Liyi Xiao, Jie Li
A fast and accurate fault injection platform for SRAM-based FPGAs. ASICON (2017)
Shanshan Liu, Liyi Xiao, Zhigang Mao
Extend orthogonal Latin square codes for 32-bit data protection in memory applications. Microelectron. Reliab. 63 (2016)
Pedro Reviriego, Shanshan Liu, Liyi Xiao, Juan Antonio Maestro
An Efficient Single and Double-Adjacent Error Correcting Parallel Decoder for the (24, 12) Extended Golay Code. IEEE Trans. Very Large Scale Integr. Syst. 24 (4) (2016)
Liyi Xiao, Jiaqiang Li, Jie Li, Jing Guo
Hardened design based on advanced orthogonal Latin code against two adjacent multiple bit upsets (MBUs) in memories. ISQED (2015)
Shanshan Liu, Liyi Xiao, Jing Guo, Zhigang Mao
Fault Secure Encoder and Decoder Designs for Matrix Codes. CAD/Graphics (2015)
Jing Guo, Liyi Xiao, Tianqi Wang, Shanshan Liu, Xu Wang, Zhigang Mao
Soft Error Hardened Memory Design for Nanoscale Complementary Metal Oxide Semiconductor Technology. IEEE Trans. Reliab. 64 (2) (2015)
Chunhua Qi, Liyi Xiao, Jing Guo, Tianqi Wang
Low cost and highly reliable radiation hardened latch design in 65 nm CMOS technology. Microelectron. Reliab. 55 (6) (2015)
Tianqi Wang, Liyi Xiao, Mingxue Huo, Chunhua Qi, Shanshan Liu
Novel technique for P-hit single-event transient mitigation using enhance dummy transistor. ISQED (2015)
Jing Guo, Liyi Xiao, Zhigang Mao
Novel Low-Power and Highly Reliable Radiation Hardened Memory Cell for 65 nm CMOS Technology. IEEE Trans. Circuits Syst. I Regul. Pap. (7) (2014)
Hai Huang, Liyi Xiao
CORDIC based fast algorithm for power-of-two point DCT and its efficient VLSI implementation. Microelectron. J. 45 (11) (2014)
Hai Huang, Liyi Xiao, Jiaming Liu
CORDIC-Based Unified Architectures for Computation of DCT/IDCT/DST/IDST. Circuits Syst. Signal Process. 33 (3) (2014)
Jing Guo, Liyi Xiao, Zhigang Mao, Qiang Zhao
Enhanced Memory Reliability Against Multiple Cell Upsets Using Decimal Matrix Code. IEEE Trans. Very Large Scale Integr. Syst. 22 (1) (2014)
Hai Huang, Liyi Xiao
CORDIC Based Fast Radix-2 DCT Algorithm. IEEE Signal Process. Lett. 20 (5) (2013)
Jing Guo, Liyi Xiao, Zhigang Mao, Qiang Zhao
Novel Mixed Codes for Multiple-Cell Upsets Mitigation in Static RAMs. IEEE Micro 33 (6) (2013)
Bin Zhou, Xin-chun Wu, Yu Sun, Tianqi Wang, Liyi Xiao
A Low Power Built-in Self-Test Scheme Based on Overlapping Bit Swapping Linear Feedback Shift Register. J. Low Power Electron. 9 (4) (2013)
Bin Zhou, Liyi Xiao, Yizheng Ye, Xin-chun Wu, Bei Cao
Test Pattern Generation Based on Multi-TRC Scan Architecture for Reducing Test Cost. J. Low Power Electron. 8 (1) (2012)
Bin Zhou, Liyi Xiao, Yizheng Ye, Xin-chun Wu
Optimization of Test Power and Data Volume in BIST Scheme Based on Scan Slice Overlapping. J. Electron. Test. 27 (1) (2011)
Ming Zhu, Liyi Xiao, Hong Wei Luo
New SEC-DED-DAEC codes for multiple bit upsets mitigation in memory. VLSI-SoC (2011)
Ming Zhu, Liyi Xiao, Li Li Song, Yan Jing Zhang, Hong Wei Luo
New Mix codes for multiple bit upsets mitigation in fault-secure memories. Microelectron. J. 42 (3) (2011)
Yu Sun, Liyi Xiao, Cong Shi
DSTN sleep transistor sizing with a new approach to estimate the maximum instantaneous current. ISCAS (2010)
Ming Zhu, Liyi Xiao, Shuhao Li, Yanjing Zhang
Efficient Two-Dimensional Error Codes for Multiple Bit Upsets Mitigation in Memory. DFT (2010)
Weiguang Sheng, Liyi Xiao, Zhigang Mao
Soft error optimization of standard cell circuits based on gate sizing and multi-objective genetic algorithm. DAC (2009)
Hong Hong, Yi Ren, Ricai Tian, Liyi Xiao
Electronic Shelf Label System based on public illuminating network. APCCAS (2008)
Bei Cao, Liyi Xiao, Yongsheng Wang
A Low Power Deterministic Test Pattern Generator for BIST Based on Cellular Automata. DELTA (2008)
Weiguang Sheng, Liyi Xiao, Zhigang Mao
Versatile and Efficient Techniques for Speeding-Up Circuit Level Simulated Fault-Injection Campaigns. PRDC (2008)
Weiguang Sheng, Liyi Xiao, Zhigang Mao
A novel soft error sensitivity characterization technique based on simulated fault injection and constrained association analysis. ICECS (2008)
Weiguang Sheng, Liyi Xiao, Zhigang Mao
An Automated Fault Injection Technique Based on VHDL Syntax Analysis and Stratified Sampling. DELTA (2008)
Yongsheng Wang, Liyi Xiao, Mingyan Yu, Jinxiang Wang, Yizheng Ye
A Test Architecture for System-on-a-Chip. Asian Test Symposium (2003)
Liyi Xiao, Yizheng Ye, Bin Li
A New Synchronization Algorithm for VHDL-AMS Simulation. J. Comput. Sci. Technol. 17 (1) (2002)
Liyi Xiao, Bin Li, Yizheng Ye, Guoyong Huang, JinJun Guo, Peng Zhang
A mixed-signal simulator for VHDL-AMS. ASP-DAC (2001)
Bin Li, Liyi Xiao, Yizheng Ye, Guoyong Huang
CLUGGS and CLUCR-Two Matrix Solution Methods for General Circuit Simulation. Annual Simulation Symposium (2001)