Daisuke Suzuki

Publication Activity (10 Years)

Years Active: 2000-2023
Publications (10 Years): 52

Top Topics

Evaluation Framework

Quality Estimation

Integrated Circuit

Top Venues

IACR Cryptol. ePrint Arch.

IACR Trans. Cryptogr. Hardw. Embed. Syst.

J. Cryptogr. Eng.

Publications

Ken Sato, Daisuke Suzuki
Design of a Nonvolatile-Neural-Network-Accelerator-Embedded Edge-IoT Device and Its Hardware Emulation. MCSoC (2023)
Shun Hinatsu, Daisuke Suzuki, Hiroki Ishizuka, Sei Ikeda, Osamu Oshiro
Evaluation of PPG Feature Values Toward Biometric Authentication Against Presentation Attacks. IEEE Access 10 (2022)
Daisuke Suzuki, Yujin Takahashi, Ikumi Yamashita, Taichi Aida, Tosho Hirasawa, Michitaka Nakatsuji, Masato Mita, Mamoru Komachi
Construction of a Quality Estimation Dataset for Automatic Evaluation of Japanese Grammatical Error Correction. CoRR (2022)
Shoei Nashimoto, Daisuke Suzuki, Rei Ueno, Naofumi Homma
Bypassing Isolated Execution on RISC-V using Side-Channel-Assisted Fault-Injection and Its Countermeasure. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2022 (1) (2022)
Tsunato Nakai, Daisuke Suzuki, Takeshi Fujino
Towards Isolated AI Accelerators with OP-TEE on SoC-FPGAs. ACNS Workshops (2022)
Naoya Shiraishi, Yuji Sato, Yoshihiko Shibuya, Shinya Fujita, Toshinori Kuwahara, Daisuke Suzuki
Attitude Control System Design of 3U CubeSat with Electrodynamic Tether for Post Mission Disposal Demonstration. SII (2022)
Toshinori Kuwahara, Alperen Pala, Adrien Potier, Yoshihiko Shibuya, Yuji Sato, Shinya Fujita, Daisuke Suzuki, Tetsuya Kaneko
Orbital Demonstration of Gossamer Structure Shape Estimation using Time-of-Flight Camera System. SII (2022)
Daisuke Suzuki, Yujin Takahashi, Ikumi Yamashita, Taichi Aida, Tosho Hirasawa, Michitaka Nakatsuji, Masato Mita, Mamoru Komachi
Construction of a Quality Estimation Dataset for Automatic Evaluation of Japanese Grammatical Error Correction. LREC (2022)
Alperen Pala, Toshinori Kuwahara, Kohei Takeda, Yoshihiko Shibuya, Yuji Sato, Shinya Fujita, Daisuke Suzuki, Tetsuya Kaneko
Orbital Maneuver Evaluation of Micro-satellite ALE-1 with a Separable Drag Sail. SII (2022)
Daisuke Suzuki, Takahiro Hanyu
A Spintronics-Based Nonvolatile FPGA and Its Application to Edge-AI Accelerator. MCSoC (2022)
Koichi Shimizu, Daisuke Suzuki, Ryo Muramatsu, Hisashi Mori, Tomoyuki Nagatsuka, Tsutomu Matsumoto
Evaluation Framework for Performance Limitation of Autonomous Systems Under Sensor Attack. SAFECOMP (2021)
Daisuke Suzuki, Takahiro Hanyu
Nonvolatile Field-Programmable Gate Array Using a Standard-Cell-Based Design Flow. IEICE Trans. Inf. Syst. (8) (2021)
Tsunato Nakai, Daisuke Suzuki, Takeshi Fujino
Towards Trained Model Confidentiality and Integrity Using Trusted Execution Environments. ACNS Workshops (2021)
Koichi Shimizu, Daisuke Suzuki, Ryo Muramatsu, Hisashi Mori, Tomoyuki Nagatsuka, Tsutomu Matsumoto
Evaluation Framework for Performance Limitation of Autonomous Systems under Sensor Attack. CoRR (2021)
Tsunato Nakai, Daisuke Suzuki, Fumio Omatsu, Takeshi Fujino
Adversarial Black-Box Attacks with Timing Side-Channel Leakage. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (1) (2021)
Tsunato Nakai, Daisuke Suzuki, Takeshi Fujino
Timing Black-Box Attacks: Crafting Adversarial Examples through Timing Leaks against DNNs on Embedded Devices. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2021 (3) (2021)
Shun Hinatsu, Daisuke Suzuki, Hiroki Ishizuka, Sei Ikeda, Osamu Oshiro
Attack on PPG Biometrics: Presentation Attack by Stealth Recording and Waveform Estimation. EMBC (2021)
Daisuke Suzuki, Takahiro Oka, Takahiro Hanyu
A Memory-Access-Minimized BCNN Accelerator Using Nonvolatile FPGA with Only-Once- Write Shifting. MCSoC (2021)
Shoei Nashimoto, Daisuke Suzuki, Noriyuki Miura, Tatsuya Machida, Kohei Matsuda, Makoto Nagata
Low-cost distance-spoofing attack on FMCW radar and its feasibility study on countermeasure. J. Cryptogr. Eng. 11 (3) (2021)
Shoei Nashimoto, Daisuke Suzuki, Rei Ueno, Naofumi Homma
Bypassing Isolated Execution on RISC-V with Fault Injection. IACR Cryptol. ePrint Arch. 2020 (2020)
Daisuke Suzuki, Takahiro Hanyu
Design and Evaluation of a Synthesizable Standard-Cell-Based Nonvolatile FPGA. ISMVL (2020)
Daisuke Suzuki, Ayako Suzuki, Keiko Shimano, Kazuki Kiyota, Yutaka Kakizaki
Analysis of Driving Performance Data Considering the Characteristics of Railway Stations. AHFE (12) (2020)
Shun Hinatsu, Daisuke Suzuki, Hiroki Ishizuka, Sei Ikeda, Osamu Oshiro
Photoplethysmographic Subject Identification by Considering Feature Values Derived from Heartbeat and Respiration. EMBC (2020)
Tsubasa Takaki, Yang Li, Kazuo Sakiyama, Shoei Nashimoto, Daisuke Suzuki, Takeshi Sugawara
An Optimized Implementation of AES-GCM for FPGA Acceleration Using High-Level Synthesis. GCCE (2020)
Noriyuki Miura, Tatsuya Machida, Kohei Matsuda, Makoto Nagata, Shoei Nashimoto, Daisuke Suzuki
A Low-Cost Replica-Based Distance-Spoofing Attack on mmWave FMCW Radar. ASHES@CCS (2019)
Daisuke Suzuki, Naoki Mizukami, Yutaka Kakizaki, Nobuyuki Tsuyuki
Analysis of Driving Performance Data to Evaluate Brake Manipulation by Railway Drivers. AHFE (13) (2019)
Daisuke Suzuki, Takahiro Oka, Takahiro Hanyu
Circuit optimization technique of nonvolatile logic-in-memory based lookup table circuits using magnetic tunnel junction devices. Microelectron. J. 83 (2019)
Masanori Natsui, Daisuke Suzuki, Akira Tamakoshi, Toshinari Watanabe, Hiroaki Honjo, Hiroki Koike, Takashi Nasuno, Yitao Ma, Takaho Tanigawa, Yasuo Noguchi, Mitsuo Yasuhira, Hideo Sato, Shoji Ikeda, Hideo Ohno, Tetsuo Endoh, Takahiro Hanyu
An FPGA-Accelerated Fully Nonvolatile Microcontroller Unit for Sensor-Node Applications in 40nm CMOS/MTJ-Hybrid Technology Achieving 47.14μW Operation at 200MHz. ISSCC (2019)
Masanori Natsui, Daisuke Suzuki, Akira Tamakoshi, Toshinari Watanabe, Hiroaki Honjo, Hiroki Koike, Takashi Nasuno, Yitao Ma, Takaho Tanigawa, Yasuo Noguchi, Mitsuo Yasuhira, Hideo Sato, Shoji Ikeda, Hideo Ohno, Tetsuo Endoh, Takahiro Hanyu
A 47.14-µW 200-MHz MOS/MTJ-Hybrid Nonvolatile Microcontroller Unit Embedding STT-MRAM and FPGA for IoT Applications. IEEE J. Solid State Circuits 54 (11) (2019)
Yusuke Naito, Mitsuru Matsui, Takeshi Sugawara, Daisuke Suzuki
SAEB: A Lightweight Blockcipher-Based AEAD Mode of Operation. IACR Cryptol. ePrint Arch. 2019 (2019)
Yusuke Naito, Mitsuru Matsui, Takeshi Sugawara, Daisuke Suzuki
SAEB: A Lightweight Blockcipher-Based AEAD Mode of Operation. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2018 (2) (2018)
Daisuke Suzuki, Takahiro Hanyu
Design of an MTJ-Based Nonvolatile LUT Circuit with a Data-Update Minimized Shift Operation for an Ultra-Low-Power FPGA: (Abstract Only). FPGA (2018)
Shoei Nashimoto, Daisuke Suzuki, Takeshi Sugawara, Kazuo Sakiyama
Sensor CON-Fusion: Defeating Kalman Filter in Signal Injection Attack. AsiaCCS (2018)
Hisae Suenaga, Haruka Minato, Daisuke Suzuki, Yoshitake Akiyama
Aggregation of Charged Microgels by Relatively Diamagnetic Assembly. MHS (2018)
Takahiro Hanyu, Daisuke Suzuki, Naoya Onizawa, Masanori Natsui
Three-terminal MTJ-based nonvolatile logic circuits with self-terminated writing mechanism for ultra-low-power VLSI processor. DATE (2017)
Daisuke Suzuki, Takahiro Hanyu
Energy-Efficient and Highly-Reliable Nonvolatile FPGA Using Self-Terminated Power-Gating Scheme. IEICE Trans. Inf. Syst. (8) (2017)
Kohei Kurihara, Yoshitaka Toyoda, Shotaro Moriya, Daisuke Suzuki, Takeo Fujita, Narihiro Matoba, Jay E. Thorton, Fatih Porikli
Light-Weight Single Image Super-Resolution via Pattern-wise Regression Function. Digital Photography and Mobile Imaging (2016)
Daisuke Suzuki, Akihiko Yoneya
Zero-cross switching control of halogen lamp heater with delta-sigma modulator. IECON (2016)
Takahiro Hanyu, Tetsuo Endoh, Daisuke Suzuki, Hiroki Koike, Yitao Ma, Naoya Onizawa, Masanori Natsui, Shoji Ikeda, Hideo Ohno
Standby-Power-Free Integrated Circuits Using MTJ-Based VLSI Computing. Proc. IEEE 104 (10) (2016)
Takeshi Sugawara, Daisuke Suzuki, Minoru Saeki
Asymmetric Leakage from Multiplier and Collision-Based Single-Shot Side-Channel Attack. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (7) (2016)
Daisuke Suzuki, Takahiro Hanyu
A low-power MTJ-based nonvolatile FPGA using self-terminated logic-in-memory structure. FPL (2016)
Daisuke Suzuki, Takahiro Hanyu
Energy-Efficient and Highly-Reliable Nonvolatile FPGA Using Self-Terminated Power-Gating Scheme. ISMVL (2016)
Taisuke Izumi, Daisuke Suzuki
Faster Enumeration of All Maximal Cliques in Unit Disk Graphs Using Geometric Structure. IEICE Trans. Inf. Syst. (3) (2015)
Takeshi Sugawara, Daisuke Suzuki, Minoru Saeki
Two Operands of Multipliers in Side-Channel Attack. COSADE (2015)
Takeshi Sugawara, Daisuke Suzuki, Ryoichi Fujii, Shigeaki Tawa, Ryohei Hori, Mitsuru Shiozaki, Takeshi Fujino
Reversing stealthy dopant-level circuits. J. Cryptogr. Eng. 5 (2) (2015)
Daisuke Suzuki, Masanori Natsui, Akira Mochizuki, Sadahiko Miura, Hiroaki Honjo, Hideo Sato, Shunsuke Fukami, Shoji Ikeda, Tetsuo Endoh, Hideo Ohno, Takahiro Hanyu
Fabrication of a 3000-6-input-LUTs embedded and block-level power-gated nonvolatile FPGA chip using p-MTJ-based logic-in-memory structure. VLSIC (2015)
Takahiro Hanyu, Daisuke Suzuki, Naoya Onizawa, Shoun Matsunaga, Masanori Natsui, Akira Mochizuki
Spintronics-based nonvolatile logic-in-memory architecture towards an ultra-low-power and highly reliable VLSI computing paradigm. DATE (2015)
Koichi Shimizu, Takeshi Sugawara, Daisuke Suzuki
PUF as a sensor. GCCE (2015)
Takeshi Sugawara, Daisuke Suzuki, Minoru Saeki
Two Operands of Multipliers in Side-Channel Attack. IACR Cryptol. ePrint Arch. 2015 (2015)
Takumi Ninomiya, Akihito Fujita, Daisuke Suzuki, Hiroyuki Umemuro
Development of the Multi-dimensional Robot Attitude Scale: Constructs of People's Attitudes Towards Domestic Robots. ICSR (2015)
Daisuke Suzuki, Takahiro Hanyu
Design of an MTJ-based nonvolatile lookup table circuit using an energy-efficient single-ended logic-in-memory structure. MWSCAS (2015)
Masanori Natsui, Daisuke Suzuki, Noboru Sakimura, Ryusuke Nebashi, Yukihide Tsuji, Ayuka Morioka, Tadahiko Sugibayashi, Sadahiko Miura, Hiroaki Honjo, Keizo Kinoshita, Shoji Ikeda, Tetsuo Endoh, Hideo Ohno, Takahiro Hanyu
Nonvolatile Logic-in-Memory LSI Using Cycle-Based Power Gating and its Application to Motion-Vector Prediction. IEEE J. Solid State Circuits 50 (2) (2015)
Daisuke Suzuki, Noboru Sakimura, Masanori Natsui, Akira Mochizuki, Tadahiko Sugibayashi, Tetsuo Endoh, Hideo Ohno, Takahiro Hanyu
A compact low-power nonvolatile flip-flop using domain-wall-motion-device-based single-ended structure. IEICE Electron. Express 11 (13) (2014)
Koichi Shimizu, Daisuke Suzuki, Toyohiro Tsurumaru, Takeshi Sugawara, Mitsuru Shiozaki, Takeshi Fujino
Unified Coprocessor Architecture for Secure Key Storage and Challenge-Response Authentication. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (1) (2014)
Takeshi Sugawara, Daisuke Suzuki, Minoru Saeki, Mitsuru Shiozaki, Takeshi Fujino
On measurable side-channel leaks inside ASIC design primitives. J. Cryptogr. Eng. 4 (1) (2014)
Takeshi Sugawara, Daisuke Suzuki, Ryoichi Fujii, Shigeaki Tawa, Ryohei Hori, Mitsuru Shiozaki, Takeshi Fujino
Reversing Stealthy Dopant-Level Circuits. IACR Cryptol. ePrint Arch. 2014 (2014)
Takeshi Sugawara, Daisuke Suzuki, Ryoichi Fujii, Shigeaki Tawa, Ryohei Hori, Mitsuru Shiozaki, Takeshi Fujino
Reversing Stealthy Dopant-Level Circuits. CHES (2014)
Daisuke Suzuki, Masanori Natsui, Akira Mochizuki, Sadahiko Miura, Hiroaki Honjo, Keizo Kinoshita, Hideo Sato, Shoji Ikeda, Tetsuo Endoh, Hideo Ohno, Takahiro Hanyu
Fabrication of a magnetic tunnel junction-based 240-tile nonvolatile field-programmable gate array chip skipping wasted write operations for greedy power-reduced logic applications. IEICE Electron. Express 10 (23) (2013)
Takeshi Sugawara, Daisuke Suzuki, Minoru Saeki, Mitsuru Shiozaki, Takeshi Fujino
On Measurable Side-Channel Leaks inside ASIC Design Primitives. IACR Cryptol. ePrint Arch. 2013 (2013)
Takeshi Sugawara, Daisuke Suzuki, Minoru Saeki, Mitsuru Shiozaki, Takeshi Fujino
On Measurable Side-Channel Leaks Inside ASIC Design Primitives. CHES (2013)
Akihito Fujita, Daisuke Suzuki, Hiroyuki Umemuro
Cross-regional comparative study of dimensions of people's attitudes toward robots. RO-MAN (2013)
Yoshitaka Toyoda, Daisuke Suzuki, Koichi Yamashita, Takashi Ito, Narihiro Matoba, Tetsuya Kuno, Hiroaki Sugiura
A visibility improvement technique for fog images suitable for real-time application. Real-Time Image and Video Processing (2013)
Mitsuru Ohtake, Daisuke Suzuki, Fumiyoshi Kirino, Masaaki Futamoto
Pt Alloy Thin Films Epitaxially Grown on Single-Crystal Substrates. IEICE Trans. Electron. (12) (2013)
Masanori Natsui, Daisuke Suzuki, Noboru Sakimura, Ryusuke Nebashi, Yukihide Tsuji, Ayuka Morioka, Tadahiko Sugibayashi, Sadahiko Miura, Hiroaki Honjo, Keizo Kinoshita, Shoji Ikeda, Tetsuo Endoh, Hideo Ohno, Takahiro Hanyu
Nonvolatile logic-in-memory array processor in 90nm MTJ/MOS achieving 75% leakage reduction using cycle-based power gating. ISSCC (2013)
Daisuke Suzuki, Fumihiro Itoigawa, Keiichi Kawata, Takashi Nakamura
Using Pulse Laser Processing to Shape Cutting Edge of PcBN Tool for High-Precision Turning of Hardened Steel. Int. J. Autom. Technol. 7 (3) (2013)
Daisuke Suzuki, Hiroyuki Umemuro
Dimensions of people's attitudes toward robots. HRI (2012)
Daisuke Suzuki, Masanori Natsui, Takahiro Hanyu
Area-efficient LUT circuit design based on asymmetry of MTJ's current switching for a nonvolatile FPGA. MWSCAS (2012)
Luca Montesi, Zeljko Zilic, Takahiro Hanyu, Daisuke Suzuki
Building Blocks to Use in Innovative Non-volatile FPGA Architecture Based on MTJs. ISVLSI (2012)
Koichi Shimizu, Daisuke Suzuki, Tomomi Kasuya
Glitch PUF: Extracting Information from Usually Unwanted Glitches. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (1) (2012)
Takeshi Sugawara, Daisuke Suzuki, Toshihiro Katashita
Circuit Simulation for Fault Sensitivity Analysis and Its Application to Cryptographic LSI. FDTC (2012)
Daisuke Suzuki, Minoru Saeki, Koichi Shimizu, Tsutomu Matsumoto
How to Decide Selection Functions for Power Analysis: From the Viewpoint of Hardware Architecture of Block Ciphers. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (1) (2011)
Daisuke Suzuki, Tsutomu Matsumoto
How to Maximize the Potential of FPGA-Based DSPs for Modular Exponentiation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (1) (2011)
Daisuke Suzuki, Koichi Shimizu
The Glitch PUF: A New Delay-PUF Architecture Exploiting Glitch Shapes. CHES (2010)
Koichi Shimizu, Daisuke Suzuki, Toyohiro Tsurumaru
High-Speed Passphrase Search System for PGP. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (1) (2010)
Minoru Sakairi, Daisuke Suzuki, Ayako Nishimura, Yukiko Ichige, Masashi Kiguchi
Simultaneous detection of breath and alcohol using breath-alcohol sensor for prevention of drunk driving. IEICE Electron. Express 7 (6) (2010)
Ayako Nishimura, Minoru Sakairi, Daisuke Suzuki
Increasing the Strength of Odors Produced by an Odor-Emitting Technology Using Odor Capsules. IEICE Trans. Inf. Syst. (4) (2010)
Daisuke Suzuki, Minoru Saeki, Koichi Shimizu, Akashi Satoh, Tsutomu Matsumoto
A Design Methodology for a DPA-Resistant Circuit with RSL Techniques. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2010)
Daisuke Suzuki, Hiroki Irieda, Michio Homma, Ikuro Kawagishi, Yuki Sudo
Phototactic and Chemotactic Signal Transduction by Transmembrane Receptors and Transducers in Microorganisms. Sensors 10 (4) (2010)
Minoru Sakairi, Ayako Nishimura, Daisuke Suzuki
Olfaction Presentation System Using Odor Scanner and Odor-Emitting Apparatus Coupled with Chemical Capsules of Alginic Acid Polymer. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2) (2009)
Mie Nakatani, Daisuke Suzuki, Nobuchika Sakata, Shogo Nishida
A Study of Auditory Warning Signals for the Design Guidelines of Man-Machine Interfaces. HCI (9) (2009)
Minoru Saeki, Daisuke Suzuki, Koichi Shimizu, Akashi Satoh
A Design Methodology for a DPA-Resistant Cryptographic LSI with RSL Techniques. CHES (2009)
Tsutomu Matsumoto, Hidenobu Mimura, Daisuke Suzuki
Complementary logics vs masked logics: Which countermeasure is a better selection? ECCTD (2009)
Daisuke Suzuki, Minoru Saeki
An Analysis of Leakage Factors for Dual-Rail Pre-Charge Logic Style. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (1) (2008)
Koichi Shimizu, Daisuke Suzuki, Toyohiro Tsurumaru
High-Speed Search System for PGP Passphrases. CANS (2008)
Minoru Saeki, Daisuke Suzuki
Security Evaluations of MRSL and DRSL Considering Signal Delays. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (1) (2008)
Mutsumi Kimura, Shigeki Sawamura, Masakazu Kato, Yuji Hara, Daisuke Suzuki, Hiroyuki Hara, Satoshi Inoue
Pulse-Width Modulation with Current Uniformization for TFT-OLEDs. IEICE Trans. Electron. (11) (2007)
Daisuke Suzuki, Minoru Saeki, Tetsuya Ichikawa
Random Switching Logic: A New Countermeasure against DPA and Second-Order DPA at the Logic Level. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (1) (2007)
Daisuke Suzuki
How to Maximize the Potential of FPGA Resources for Modular Exponentiation. CHES (2007)
Minoru Saeki, Daisuke Suzuki, Tetsuya Ichikawa
Leakage Analysis of DPA Countermeasures at the Logic Level. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (1) (2007)
Akira Utsumi, Daisuke Suzuki
Word Vectors and Two Kinds of Similarity. ACL (2006)
Daisuke Suzuki, Minoru Saeki
Security Evaluation of DPA Countermeasures Using Dual-Rail Pre-charge Logic Style. CHES (2006)
Daisuke Suzuki, Minoru Saeki, Tetsuya Ichikawa
DPA Leakage Models for CMOS Logic Circuits. CHES (2005)
Daisuke Suzuki, Minoru Saeki, Tetsuya Ichikawa
Random Switching Logic: A Countermeasure against DPA based on Transition Probability. IACR Cryptol. ePrint Arch. 2004 (2004)
Kazuhito Ito, Daisuke Suzuki
A high-level synthesis method for simultaneous placement and scheduling considering data communication delay. APCCAS (1) (2002)
Akihiko Kandori, Tsuyoshi Miyashita, Daisuke Suzuki, Koichi Yokosawa, Keiji Tsukada
Two-dimensional mapping of impedance magnetocardiograms. IEEE Trans. Biomed. Eng. 49 (7) (2002)
Daisuke Suzuki, Tsuyoshi Miyazaki, Koji Yamada, Tsuyoshi Nakamura, Hidenori Itoh
A Supporting System for Colored Knitting Design. IEA/AIE (2000)