Tetsuya Ichikawa

Publication Activity (10 Years)

Years Active: 2000-2007
Publications (10 Years): 0

Publications

Daisuke Suzuki, Minoru Saeki, Tetsuya Ichikawa
Random Switching Logic: A New Countermeasure against DPA and Second-Order DPA at the Logic Level. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (1) (2007)
Minoru Saeki, Daisuke Suzuki, Tetsuya Ichikawa
Leakage Analysis of DPA Countermeasures at the Logic Level. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (1) (2007)
Daisuke Suzuki, Minoru Saeki, Tetsuya Ichikawa
DPA Leakage Models for CMOS Logic Circuits. CHES (2005)
Daisuke Suzuki, Minoru Saeki, Tetsuya Ichikawa
Random Switching Logic: A Countermeasure against DPA based on Transition Probability. IACR Cryptol. ePrint Arch. 2004 (2004)
Kazumaro Aoki, Tetsuya Ichikawa, Masayuki Kanda, Mitsuru Matsui, Shiho Moriai, Junko Nakajima, Toshio Tokita
. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (1) (2002)
Tetsuya Ichikawa, Tomomi Kasuya, Mitsuru Matsui
Hardware Evaluation of the AES Finalists. AES Candidate Conference (2000)
Kazumaro Aoki, Tetsuya Ichikawa, Masayuki Kanda, Mitsuru Matsui, Shiho Moriai, Junko Nakajima, Toshio Tokita
Camellia: A 128-Bit Block Cipher Suitable for Multiple Platforms - Design and Analysis. Selected Areas in Cryptography (2000)