Piero Olivo

Publication Activity (10 Years)

Years Active: 1988-2022
Publications (10 Years): 15

Top Topics

Top Venues

IEEE Trans. Emerg. Top. Comput.

Publications

Piergiulio Mannocci, Andrea Baroni, Enrico Melacarne, Cristian Zambelli, Piero Olivo, Eduardo Pérez, Christian Wenger, Daniele Ielmini
Experimental verification and benchmark of in-memory principal component analysis by crosspoint arrays of resistive switching memory. ISCAS (2022)
Artem Glukhov, Valerio Milo, Andrea Baroni, Nicola Lepri, Cristian Zambelli, Piero Olivo, Eduardo Pérez, Christian Wenger, Daniele Ielmini
Statistical model of program/verify algorithms in resistive-switching memories for in-memory neural network accelerators. IRPS (2022)
Artem Glukhov, Nicola Lepri, Valerio Milo, Andrea Baroni, Cristian Zambelli, Piero Olivo, Eduardo Pérez, Christian Wenger, Daniele Ielmini
End-to-end modeling of variability-aware neural networks based on resistive-switching memory arrays. VLSI-SoC (2022)
Valerio Milo, Francesco Anzalone, Cristian Zambelli, Eduardo Pérez, Mamathamba Kalishettyhalli Mahadevaiah, Oscar Gonzalez Ossorio, Piero Olivo, Christian Wenger, Daniele Ielmini
Optimized programming algorithms for multilevel RRAM in hardware neural networks. IRPS (2021)
Lorenzo Zuolo, Cristian Zambelli, Alessia Marelli, Rino Micheloni, Piero Olivo
LDPC Soft Decoding with Improved Performance in 1X-2X MLC and TLC NAND Flash-Based Solid State Drives. IEEE Trans. Emerg. Top. Comput. 7 (3) (2019)
M. K. Mahadevaiah, Eduardo Pérez, Christian Wenger, Alessandro Grossi, Cristian Zambelli, Piero Olivo, Finn Zahari, Hermann Kohlstedt, Martin Ziegler
Reliability of CMOS Integrated Memristive HfO2 Arrays with Respect to Neuromorphic Computing. IRPS (2019)
Cristian Zambelli, Riccardo Bertaggia, Lorenzo Zuolo, Rino Micheloni, Piero Olivo
Enabling Computational Storage Through FPGA Neural Network Accelerator for Enterprise SSD. IEEE Trans. Circuits Syst. II Express Briefs (10) (2019)
Valerio Milo, Cristian Zambelli, Piero Olivo, Eduardo Pérez, Oscar Gonzalez Ossorio, Christian Wenger, Daniele Ielmini
Low-energy inference machine with multilevel HfO2 RRAM arrays. ESSDERC (2019)
Cristian Zambelli, Marco Castellari, Piero Olivo, Davide Bertozzi
Correlating Power Efficiency and Lifetime to Programming Strategies in RRAM-Based FPGAs. NGCAS (2018)
Francesco Pieri, Cristian Zambelli, Andrea Nannini, Piero Olivo, Sergio Saponara
Is Consumer Electronics Redesigning Our Cars?: Challenges of Integrated Technologies for Sensing, Computing, and Storage. IEEE Consumer Electron. Mag. 7 (5) (2018)
Alessandro Grossi, Cristian Zambelli, Piero Olivo, Paolo Pellati, Michele Ramponi, Christian Wenger, Jérémy Alvarez-Herault, Ken Mackay
An Automated Test Equipment for Characterization of Emerging MRAM and RRAM Arrays. IEEE Trans. Emerg. Top. Comput. 6 (2) (2018)
Alessandro Grossi, Elisa Vianello, Cristian Zambelli, Pablo Royer, Jean-Philippe Noel, Bastien Giraud, Luca Perniola, Piero Olivo, Etienne Nowak
Experimental Investigation of 4-kb RRAM Arrays Programming Conditions Suitable for TCAM. IEEE Trans. Very Large Scale Integr. Syst. 26 (12) (2018)
Lorenzo Zuolo, Cristian Zambelli, Rino Micheloni, Piero Olivo
Solid-State Drives: Memory Driven Design Methodologies for Optimal Performance. Proc. IEEE 105 (9) (2017)
Rino Micheloni, Piero Olivo
Solid-State Drives (SSDs) [Scanning the Issue]. Proc. IEEE 105 (9) (2017)
Rino Micheloni, Luca Crippa, Cristian Zambelli, Piero Olivo
Architectural and Integration Options for 3D NAND Flash Memories. Comput. 6 (3) (2017)
Davide Bertozzi, Stefano Di Carlo, Salvatore Galfano, Marco Indaco, Piero Olivo, Paolo Prinetto, Cristian Zambelli
Performance and Reliability Analysis of Cross-Layer Optimizations of NAND Flash Controllers. ACM Trans. Embed. Comput. Syst. 14 (1) (2015)
Alessandro Grossi, Cristian Zambelli, Piero Olivo, Paolo Pellati, Michele Ramponi, Jérémy Alvarez-Herault, Ken Mackay
Automated characterization of TAS-MRAM test arrays. DTIS (2015)
Alessandro Grossi, Cristian Zambelli, Piero Olivo, Jérémy Alvarez-Herault, Ken Mackay
Reliability and cell-to-cell variability of TAS-MRAM arrays under cycling conditions. NVMTS (2015)
Lorenzo Zuolo, Cristian Zambelli, Rino Micheloni, Marco Indaco, Stefano Di Carlo, Paolo Prinetto, Davide Bertozzi, Piero Olivo
SSDExplorer: A Virtual Platform for Performance/Reliability-Oriented Fine-Grained Design Space Exploration of Solid State Drives. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34 (10) (2015)
Lorenzo Zuolo, Cristian Zambelli, Rino Micheloni, Stephen Bates, Piero Olivo
Design space exploration of latency and bandwidth in RRAM-based solid state drives. NVMTS (2015)
Cristian Zambelli, Alessandro Grossi, Piero Olivo, Christian Walczyk, Christian Wenger
RRAM Reliability/Performance Characterization through Array Architectures Investigations. ISVLSI (2015)
Lorenzo Zuolo, Cristian Zambelli, Rino Micheloni, Salvatore Galfano, Marco Indaco, Stefano Di Carlo, Paolo Prinetto, Piero Olivo, Davide Bertozzi
SSDExplorer: A virtual platform for fine-grained design space exploration of Solid State Drives. DATE (2014)
Stefano Di Carlo, Salvatore Galfano, Marco Indaco, Paolo Prinetto, Davide Bertozzi, Piero Olivo, Cristian Zambelli
FLARES: An Aging Aware Algorithm to Autonomously Adapt the Error Correction Capability in NAND Flash Memories. ACM Trans. Archit. Code Optim. 11 (3) (2014)
Lorenzo Zuolo, Gabriele Miorandi, Cristian Zambelli, Piero Olivo, Davide Bertozzi
System interconnect extensions for fully transparent demand paging in low-cost MMU-less embedded systems. ISSoC (2013)
Cristian Zambelli, Andrea Chimenton, Piero Olivo
Modeling of SET seasoning effects in Phase Change Memory arrays. Microelectron. Reliab. 52 (6) (2012)
Cristian Zambelli, Marco Indaco, Michele Fabiano, Stefano Di Carlo, Paolo Prinetto, Piero Olivo, Davide Bertozzi
A cross-layer approach for new reliability-performance trade-offs in MLC NAND flash memories. DATE (2012)
Cristian Zambelli, Davide Bertozzi, Andrea Chimenton, Piero Olivo
Nonvolatile Memory Partitioning Scheme for Technology-Based Performance-Reliability Tradeoff. IEEE Embed. Syst. Lett. 3 (1) (2011)
Andrea Chimenton, Fernanda Irrera, Piero Olivo
Improving performance and reliability of NOR-Flash arrays by using pulsed operation. Microelectron. Reliab. 46 (9-11) (2006)
Andrea Chimenton, Piero Olivo
Reliability of erasing operation in NOR-Flash memories. Microelectron. Reliab. 45 (7-8) (2005)
Andrea Chimenton, Paolo Pellati, Piero Olivo
Overerase phenomena: an insight into flash memory reliability. Proc. IEEE 91 (4) (2003)
Paolo Pellati, Piero Olivo
Automated test equipment for research on nonvolatile memories. IEEE Trans. Instrum. Meas. 50 (5) (2001)
Piero Olivo, Marcello Dalpasso
A Bist Scheme for Non-Volatile Memories. J. Electron. Test. 12 (1-2) (1998)
Paolo Pavan, Roberto Bez, Piero Olivo, Enrico Zanoni
Flash memory cells-an overview. Proc. IEEE 85 (8) (1997)
Cecilia Metra, Michele Favalli, Piero Olivo, Bruno Riccò
On-line detection of bridging and delay faults in functional blocks of CMOS self-checking circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16 (7) (1997)
Piero Olivo, Marcello Dalpasso
Self-Learning Signature Analysis for Non-Volatile Memory Testing. ITC (1996)
Michele Favalli, Marcello Dalpasso, Piero Olivo
Modeling and simulation of broken connections in CMOS IC's. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15 (7) (1996)
Alessandro Bogliolo, Maurizio Damiani, Piero Olivo, Bruno Riccò
Reliability evaluation of combinational logic circuits by symbolic simulation. VTS (1995)
Marcello Dalpasso, Michele Favalli, Piero Olivo
: increasing test quality. VTS (1995)
Cecilia Metra, Michele Favalli, Piero Olivo, Bruno Riccò
Design of CMOS checkers with improved testability of bridging and transistor stuck-on faults. J. Electron. Test. 6 (1) (1995)
Marcello Dalpasso, Michele Favalli, Piero Olivo
testing quality and sensor accuracy. ED&TC (1995)
Michele Favalli, Marcello Dalpasso, Piero Olivo, Bruno Riccò
Modeling of Broken Connections Faults in CMOS ICs. EDAC-ETC-EUROASIC (1994)
Michele Favalli, Marcello Dalpasso, Piero Olivo, Bruno Riccò
Analysis of resistive bridging fault detection in BiCMOS digital ICs. IEEE Trans. Very Large Scale Integr. Syst. 1 (3) (1993)
Michele Favalli, Marcello Dalpasso, Piero Olivo, Bruno Riccò
Analyss of Dynamic Effects of Resistive Bridging Faults in CMOS and BiCMOS Digital ICs. ITC (1993)
Cecilia Metra, Michele Favalli, Piero Olivo, Bruno Riccò
A Highly Testable 1-out-of-3 CMOS Checker. DFT (1993)
Marcello Dalpasso, Michele Favalli, Piero Olivo, Bruno Riccò
Fault simulation of parametric bridging faults in CMOS IC's. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12 (9) (1993)
Cecilia Metra, Michele Favalli, Piero Olivo, Bruno Riccò
Design Rules for CMOS Self Checking Circuits with Parametric Faults in the Functional Block. DFT (1993)
Silvia Ercolani, Michele Favalli, Maurizio Damiani, Piero Olivo, Bruno Riccò
Testability measures in pseudorandom testing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11 (6) (1992)
Michele Favalli, Piero Olivo, Bruno Riccò
A probabilistic fault model for 'analog' faults in digital CMOS circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11 (11) (1992)
Cecilia Metra, Michele Favalli, Piero Olivo, Bruno Riccò
CMOS Checkers with Testable Bridging and Transistor Stuck-on Faults. ITC (1992)
Michele Favalli, Piero Olivo, Bruno Riccò
Dynamic effects in the detection of bridging faults in CMOS ICs. J. Electron. Test. 3 (3) (1992)
Marcello Dalpasso, Michele Favalli, Piero Olivo, Bruno Riccò
Parametric Bridging Fault Characterization for the Fault Simulation of Library-Based ICs. ITC (1992)
Michele Favalli, Marcello Dalpasso, Piero Olivo, Bruno Riccò
Analysis of Steady State Detection of Resistive Bridging Faults in BiCMOS Digital ICs. ITC (1992)
Michele Favalli, Piero Olivo, Bruno Riccò
A novel critical path heuristic for fast fault grading. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10 (4) (1991)
Michele Favalli, Piero Olivo, Maurizio Damiani, Bruno Riccò
Fault simulation of unconventional faults in CMOS circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10 (5) (1991)
Michele Favalli, Piero Olivo, Bruno Riccò, Fabio Somenzi
Fault simulation for general FCMOS ICs. J. Electron. Test. 2 (2) (1991)
Maurizio Damiani, Piero Olivo, Bruno Riccò
Analysis and Design of Linear Finite State Machines for Signature Analysis Testing. IEEE Trans. Computers 40 (9) (1991)
M. Ambanelli, Michele Favalli, Piero Olivo, Bruno Riccò
Detection of PLA multiple crosspoint faults. EURO-DAC (1991)
Michele Favalli, Piero Olivo, Bruno Riccò
A probabilistic fault model for analog faults. EURO-DAC (1991)
Massimo Lanzoni, Roberto Menozzi, Piero Olivo, Bruno Riccò, Andrea Haardt
PROM aging and endurance: A case study. Eur. Trans. Telecommun. 1 (2) (1990)
Maurizio Damiani, Piero Olivo, Michele Favalli, Silvia Ercolani, Bruno Riccò
Aliasing in signature analysis testing with multiple input shift registers. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9 (12) (1990)
Maurizio Damiani, Piero Olivo, Michele Favalli, Bruno Riccò
An analytical model for the aliasing probability in signature analysis testing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8 (11) (1989)
Michele Favalli, Piero Olivo, Maurizio Damiani, Bruno Riccò
CMOS Design for Improved IC Testability. ITC (1989)
Piero Olivo, Maurizio Damiani, Bruno Riccò
On the Design of Multiple-Input Shift-Registers for Signature Analysis Testing. ITC (1989)
Mattia Lanzoni, Piero Olivo, Bruno Riccò
A Testing Technique to Characterize E^2PROM's Aging and Endurance. ITC (1989)
Silvia Ercolani, Michele Favalli, Maurizio Damiani, Piero Olivo, Bruno Riccò
Improved testability evaluations in combinational logic networks. ICCD (1989)
Maurizio Damiani, Piero Olivo, Michele Favalli, Bruno Riccò
Aliasing errors in signature analysis testing of integrated circuits. ICCD (1988)