Maurizio Damiani

Publication Activity (10 Years)

Years Active: 1988-2023
Publications (10 Years): 1

Top Topics

Prime Implicants

Boolean Functions

Top Venues

Discret. Appl. Math.

Publications

Maurizio Damiani
Partially unate Boolean functions: Properties of their sum-of-products representations. Discret. Appl. Math. 338 (2023)
Maurizio Damiani, Andrei Y. Selchenko
Boolean Technology Mapping Based on Logic Decomposition. SBCCI (2003)
Alessandro Bogliolo, Michele Favalli, Maurizio Damiani
-checkable voters. IEEE Trans. Very Large Scale Integr. Syst. 8 (4) (2000)
Valeria Bertacco, Maurizio Damiani, Stefano Quer
Cycle-Based Symbolic Simulation of Gate-Level Synchronous Circuits. DAC (1999)
Maurizio Damiani
The state reduction of nondeterministic finite-state machines. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16 (11) (1997)
Valeria Bertacco, Maurizio Damiani
The disjunctive decomposition of logic functions. ICCAD (1997)
Jerry Chih-Yuan Yang, Giovanni De Micheli, Maurizio Damiani
Scheduling and control generation with environmental constraints based on automata representations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15 (2) (1996)
Valeria Bertacco, Maurizio Damiani
Boolean Function Representation Based on Disjoint-Support Decompositions. ICCD (1996)
Valeria Bertacco, Maurizio Damiani
Boolean Function Representation Using Parallel-Access Diagrams. Great Lakes Symposium on VLSI (1996)
Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Maurizio Damiani, Leonardo Impagliazzo, G. Sartore
On-line Testing of an Off-the-shelf Microprocessor Board for Safety-critical Applications. EDCC (1996)
Vishwani D. Agrawal, Ronald D. Blanton, Maurizio Damiani
Synthesis of Self-Testing Finite State Machines from High-Level Specifications. ITC (1996)
Alessandro Bogliolo, Maurizio Damiani, Piero Olivo, Bruno Riccò
Reliability evaluation of combinational logic circuits by symbolic simulation. VTS (1995)
Alessandro Bogliolo, Maurizio Damiani
Synthesis of multilevel fault-tolerant combinational circuits. ED&TC (1995)
Maurizio Damiani, Jerry Chih-Yuan Yang, Giovanni De Micheli
Optimization of combinational logic circuits based on compatible gates. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14 (11) (1995)
Alessandro Bogliolo, Maurizio Damiani
Synthesis of combinational circuits with special fault-handling capabilitie. VTS (1995)
Maurizio Damiani
. EDAC-ETC-EUROASIC (1994)
Jérôme Fron, Jerry Chih-Yuan Yang, Maurizio Damiani, Giovanni De Micheli
A Synthesis Framework Based on Trace and Automata Theory. ISCAS (1994)
Jerry Chih-Yuan Yang, Giovanni De Micheli, Maurizio Damiani
Scheduling with Environmental Constraints based on Automata Representations. EDAC-ETC-EUROASIC (1994)
Maurizio Damiani, Giovanni De Micheli
Don't care set specifications in combinational and synchronous logic circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12 (3) (1993)
Maurizio Damiani, Jerry Chih-Yuan Yang, Giovanni De Micheli
Optimization of Combinational Logic Circuits Based on Compatible Gates. DAC (1993)
Silvia Ercolani, Michele Favalli, Maurizio Damiani, Piero Olivo, Bruno Riccò
Testability measures in pseudorandom testing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11 (6) (1992)
Maurizio Damiani, Giovanni De Micheli
Recurrence Equations and the Optimization of Synchronous Logic Circuits. DAC (1992)
Michele Favalli, Piero Olivo, Maurizio Damiani, Bruno Riccò
Fault simulation of unconventional faults in CMOS circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10 (5) (1991)
Maurizio Damiani, Piero Olivo, Bruno Riccò
Analysis and Design of Linear Finite State Machines for Signature Analysis Testing. IEEE Trans. Computers 40 (9) (1991)
Maurizio Damiani, Piero Olivo, Michele Favalli, Silvia Ercolani, Bruno Riccò
Aliasing in signature analysis testing with multiple input shift registers. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9 (12) (1990)
Maurizio Damiani, Giovanni De Micheli
Observability Don't Care Sets and Boolean Relations. ICCAD (1990)
Maurizio Damiani, Piero Olivo, Michele Favalli, Bruno Riccò
An analytical model for the aliasing probability in signature analysis testing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8 (11) (1989)
Michele Favalli, Piero Olivo, Maurizio Damiani, Bruno Riccò
CMOS Design for Improved IC Testability. ITC (1989)
Piero Olivo, Maurizio Damiani, Bruno Riccò
On the Design of Multiple-Input Shift-Registers for Signature Analysis Testing. ITC (1989)
Silvia Ercolani, Michele Favalli, Maurizio Damiani, Piero Olivo, Bruno Riccò
Improved testability evaluations in combinational logic networks. ICCD (1989)
Maurizio Damiani, Piero Olivo, Michele Favalli, Bruno Riccò
Aliasing errors in signature analysis testing of integrated circuits. ICCD (1988)