A probabilistic fault model for 'analog' faults in digital CMOS circuits.
Michele FavalliPiero OlivoBruno RiccòPublished in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (1992)
Keyphrases
- fault model
- circuit design
- mixed signal
- analog vlsi
- low power
- multi channel
- vlsi circuits
- safety analysis
- digital circuits
- fault models
- model based diagnosis
- fault injection
- cmos technology
- floating gate
- bayesian networks
- cmos image sensor
- low cost
- high speed
- focal plane
- delay insensitive
- probabilistic model
- low voltage
- analog circuits
- single chip
- power consumption
- power dissipation