Design Rules for CMOS Self Checking Circuits with Parametric Faults in the Functional Block.

Cecilia Metra Michele Favalli Piero Olivo Bruno Riccò

Published in: DFT (1993)

Keyphrases

circuit design
chip design
delay insensitive
high speed
low cost
power dissipation
design process
vlsi circuits
analog vlsi
cmos technology
shape grammars
functional verification
high level synthesis
electronic circuits
expert systems
single chip
design tools
rule sets
fuzzy rules
control system