Tetsuya Hirose

ORCID

Publication Activity (10 Years)

Years Active: 1993-2024
Publications (10 Years): 40

Top Venues

ISCAS

NEWCAS

IEICE Trans. Fundam. Electron. Commun. Comput. Sci.

ICECS

Publications

Ryota Tsunaga, Daisuke Kanemoto, Tetsuya Hirose
Noise-Masking Cryptosystem Using Watermark and Chain Generation for EEG Measurement with Compressed Sensing. ICCE (2024)
Riku Matsubara, Daisuke Kanemoto, Tetsuya Hirose
Reducing Power Consumption in LNA by Utilizing EEG Signals as Basis Matrix in Compressed Sensing. ISCAS (2024)
Takuya Miyata, Daisuke Kanemoto, Tetsuya Hirose
Utilizing Previously Acquired BSBL Algorithm Parameters in the Compressed Sensing Framework for EEG Measurements. ICCE (2024)
Takuya Miyata, Daisuke Kanemoto, Tetsuya Hirose
Random Undersampling Wireless EEG Measurement Device using a Small TEG. ISCAS (2023)
Noriyuki Miura, Kotaro Naruse, Jun Shiomi, Yoshihiro Midoh, Tetsuya Hirose, Takaaki Okidono, Takuji Miki, Makoto Nagata
A Triturated Sensing System. ISSCC (2023)
Yoshinori Itotagawa, Koma Atsumi, Hikaru Sebe, Daisuke Kanemoto, Tetsuya Hirose
A Programmable Differential Bandgap Reference for Ultra-Low-Power IoT Edge Node Devices. ISCAS (2023)
Hikaru Sebe, Tomohisa Okumura, Shintaro Sumi, Daisuke Kanemoto, Po-Hung Chen, Tetsuya Hirose
Sub-30-mV-Supply, Fully Integrated Ring Oscillator Consisting of Recursive Stacking Body-Bias Inverters for Extremely Low-Voltage Energy Harvesting. ESSCIRC (2023)
Daisuke Kanemoto, Tetsuya Hirose
EEG Measurements with Compressed Sensing Utilizing EEG Signals as the Basis Matrix. ISCAS (2023)
Hikaru Sebe, Daisuke Kanemoto, Tetsuya Hirose
Sub-50-mV Charge Pump and its Driver for Extremely Low-Voltage Thermal Energy Harvesting. ISCAS (2022)
Yuuki Harada, Daisuke Kanemoto, Takahiro Inoue, Osamu Maida, Tetsuya Hirose
Image Quality Improvement for Capsule Endoscopy Based on Compressed Sensing with K-SVD Dictionary Learning. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (4) (2022)
Yuki Okabe, Daisuke Kanemoto, Osamu Maida, Tetsuya Hirose
Compressed Sensing EEG Measurement Technique with Normally Distributed Sampling Series. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (10) (2022)
Kazuya Urazoe, Nobutaka Kuroki, Yu Kato, Shinya Ohtani, Tetsuya Hirose, Masahiro Numa
Multi-Category Image Super-Resolution with Convolutional Neural Network and Multi-Task Learning. IEICE Trans. Inf. Syst. (1) (2021)
Masaya Nishi, Kaori Matsumoto, Nobutaka Kuroki, Masahiro Numa, Hikaru Sebe, Ryo Matsuzuka, Osamu Maida, Daisuke Kanemoto, Tetsuya Hirose
A 35-mV supply ring oscillator consisting of stacked body bias inverters for extremely low-voltage LSIs. IEICE Electron. Express 18 (6) (2021)
Masaya Nishi, Kaori Matsumoto, Nobutaka Kuroki, Masahiro Numa, Hikaru Sebe, Ryo Matsuzuka, Osamu Maida, Daisuke Kanemoto, Tetsuya Hirose
A 34-mV Startup Ring Oscillator Using Stacked Body Bias Inverters for Extremely Low-Voltage Thermoelectric Energy Harvesting. NEWCAS (2020)
Kazuya Urazoe, Nobutaka Kuroki, Yu Kato, Shinya Ohtani, Tetsuya Hirose, Masahiro Numa
Improvement of Luminance Isotropy for Convolutional Neural Networks-Based Image Super-Resolution. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (7) (2020)
Kaori Matsumoto, Hiroki Asano, Yuichiro Nakazawa, Nobutaka Kuroki, Masahiro Numa, Osamu Maida, Daisuke Kanemoto, Tetsuya Hirose
An 11.8 nA ultra-low power active diode using a hysteresis common gate comparator for low-power energy harvesting systems. IEICE Electron. Express 17 (11) (2020)
Kunihiko Taya, Nobutaka Kuroki, Naoto Takeda, Tetsuya Hirose, Masahiro Numa
Detecting tampered regions in JPEG images via CNN. NEWCAS (2020)
Tetsuya Hirose, Yuichiro Nakazawa
Design of Switched-Capacitor Voltage Boost Converter for Low-Voltage and Low-Power Energy Harvesting Systems. IEICE Trans. Electron. (10) (2020)
Ming-Jie Chung, Tetsuya Hirose, Takahito Ono, Po-Hung Chen
A 115× Conversion-Ratio Thermoelectric Energy-Harvesting Battery Charger for the Internet of Things. IEEE Trans. Circuits Syst. (11) (2020)
Yuji Yano, Seiya Yoshida, Shintaro Izumi, Hiroshi Kawaguchi, Tetsuya Hirose, Masaya Miyahara, Teruki Someya, Kenichi Okada, Ippei Akita, Yoshihiko Kurui, Hideyuki Tomizawa, Masahiko Yoshimoto
An IoT Sensor Node SoC with Dynamic Power Scheduling for Sustainable Operation in Energy Harvesting Environment. A-SSCC (2019)
Masaya Nishi, Yuichiro Nakazawa, Kaori Matsumoto, Nobutaka Kuroki, Masahiro Numa, Ryo Matsuzuka, Osamu Maida, Daisuke Kanemoto, Tetsuya Hirose
Sub-0.1V Input, Low-Voltage CMOS Driver Circuit for Multi-Stage Switched Capacitor Voltage Boost Converter. ICECS (2019)
Kaori Matsumoto, Tetsuya Hirose, Hiroki Asano, Yuto Tsuji, Yuichiro Nakazawa, Nobutaka Kuroki, Masahiro Numa
An ultra-low power active diode using a hysteresis common gate comparator for low-voltage and low-power energy harvesting systems. VLSI-SoC (2018)
Ryo Shirai, Tetsuya Hirose, Masanori Hashimoto
A Multifunctional Sensor Node Sharing Coils in Wireless Power Supply, Wireless Communication and Distance Sensing Modes. NEWCAS (2018)
Yuichiro Nakazawa, Tetsuya Hirose, Toshihiro Ozaki, Yuto Tsuji, Shuto Kanzaki, Hiroki Asano, Nobutaka Kuroki, Masahiro Numa
Analytical Study of Multi-stage Switched-Capacitor Voltage Boost Converter for Ultra-low Voltage Energy Harvesting. ISCAS (2018)
Shuto Kanzaki, Tetsuya Hirose, Hiroki Asano, Yuichiro Nakazawa, Nobutaka Kuroki, Masahiro Numa
Switched-Capacitor Voltage Buck Converter with Step-Down-Ratio and Clock-Frequency Controllers for Ultra-Low-Power IoT Devices. ICECS (2018)
Hiroki Asano, Tetsuya Hirose, Taro Miyoshi, Keishi Tsubaki, Toshihiro Ozaki, Nobutaka Kuroki, Masahiro Numa
A Sub-1-µs Start-Up Time, Fully-Integrated 32-MHz Relaxation Oscillator for Low-Power Intermittent Systems. IEICE Trans. Electron. (3) (2018)
Shinya Ohtani, Yu Kato, Nobutaka Kuroki, Tetsuya Hirose, Masahiro Numa
Multi-Channel Convolutional Neural Networks for Image Super-Resolution. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2) (2017)
Masanori Hashimoto, Ryo Shirai, Yuichi Itoh, Tetsuya Hirose
Toward real-time 3D modeling system with cubic-millimeters wireless sensor nodes. ASICON (2017)
Hiroki Asano, Tetsuya Hirose, Toshihiro Ozaki, Nobutaka Kuroki, Masahiro Numa
An area-efficient, 0.022-mm2, fully integrated resistor-less relaxation oscillator for ultra-low power real-time clock applications. ISCAS (2017)
Ryo Matsuzuka, Tetsuya Hirose, Yuzuru Shizuku, Kyohei Shinonaga, Nobutaka Kuroki, Masahiro Numa
An 80-mV-to-1.8-V Conversion-Range Low-Energy Level Shifter for Extremely Low-Voltage VLSIs. IEEE Trans. Circuits Syst. I Regul. Pap. (8) (2017)
Yuto Tsuji, Tetsuya Hirose, Toshihiro Ozaki, Hiroki Asano, Nobutaka Kuroki, Masahiro Numa
A 0.1-0.6 V input range voltage boost converter with low-leakage driver for low-voltage energy harvesting. ICECS (2017)
Ryo Shirai, Jin Kono, Tetsuya Hirose, Masanori Hashimoto
Near-field dual-use antenna for magnetic-field based communication and electrical-field based distance sensing in mm3-class sensor node. ISCAS (2017)
Hiroki Asano, Tetsuya Hirose, Taro Miyoshi, Keishi Tsubaki, Toshihiro Ozaki, Nobutaka Kuroki, Masahiro Numa
Sub-1-μs start-up time, 32-MHz relaxation oscillator for low-power intermittent VLSI systems. ASP-DAC (2017)
Takanori Sato, Tetsuya Hirose, Hiroki Asano, Nobutaka Kuroki, Masahiro Numa
An ultra-low-power supercapacitor voltage monitoring system for low-voltage energy harvesting. ICECS (2017)
Toshihiro Ozaki, Tetsuya Hirose, Hiroki Asano, Nobutaka Kuroki, Masahiro Numa
A 0.38-μW stand-by power, 50-nA-to-1-mA load current range DC-DC converter with self-biased linear regulator for ultra-low power battery management. A-SSCC (2016)
Toshihiro Ozaki, Tetsuya Hirose, Hiroki Asano, Nobutaka Kuroki, Masahiro Numa
Fully-Integrated High-Conversion-Ratio Dual-Output Voltage Boost Converter With MPPT for Low-Voltage Energy Harvesting. IEEE J. Solid State Circuits 51 (10) (2016)
Toshihiro Ozaki, Tetsuya Hirose, Takahiro Nagai, Keishi Tsubaki, Nobutaka Kuroki, Masahiro Numa
A Highly Efficient Switched-Capacitor Voltage Boost Converter with Nano-Watt MPPT Controller for Low-Voltage Energy Harvesting. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2016)
Hiroki Asano, Tetsuya Hirose, Keishi Tsubaki, Taro Miyoshi, Toshihiro Ozaki, Nobutaka Kuroki, Masahiro Numa
A 1.66-nW/kHz, 32.7-kHz, 99.5ppm/°C fully integrated current-mode RC oscillator for real-time clock applications with PVT stability. ESSCIRC (2016)
Hiroki Asano, Tetsuya Hirose, Taro Miyoshi, Keishi Tsubaki, Toshihiro Ozaki, Nobutaka Kuroki, Masahiro Numa
A fully integrated, 1-µs start-up time, 32-MHz relaxation oscillator for low-power intermittent systems. NEWCAS (2016)
Yu Kato, Shinya Ohtani, Nobutaka Kuroki, Tetsuya Hirose, Masahiro Numa
Image super-resolution with multi-channel convolutional neural networks. NEWCAS (2016)
Yuzuru Shizuku, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa, Mitsuji Okada
Energy-efficient AES SubBytes transformation circuit using asynchronous circuits for ultra-low voltage operation. IEICE Electron. Express 12 (4) (2015)
Keishi Tsubaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa
A 32-kHz Real-Time Clock Oscillator with On-Chip PVT Variation Compensation Circuit for Ultra-Low Power MCUs. IEICE Trans. Electron. (5) (2015)
Ryo Matsuzuka, Tetsuya Hirose, Yuzuru Shizuku, Nobutaka Kuroki, Masahiro Numa
A 0.19-V minimum input low energy level shifter for extremely low-voltage VLSIs. ISCAS (2015)
Yuzuru Shizuku, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa, Mitsuji Okada
An Energy-Efficient 24T Flip-Flop Consisting of Standard CMOS Gates for Ultra-Low Power Digital VLSIs. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2015)
Toshihiro Ozaki, Tetsuya Hirose, Takahiro Nagai, Keishi Tsubaki, Nobutaka Kuroki, Masahiro Numa
A 0.21-V minimum input, 73.6% maximum efficiency, fully integrated 3-terminal voltage converter with MPPT for low-voltage energy harvesters. ASP-DAC (2015)
Toshihiro Ozaki, Tetsuya Hirose, Hiroki Asano, Nobutaka Kuroki, Masahiro Numa
A fully-integrated, high-conversion-ratio and dual-output voltage boost converter with MPPT for low-voltage energy harvesting. A-SSCC (2015)
Keishi Tsubaki, Tetsuya Hirose, Yuji Osaki, Seiichiro Shiga, Nobutaka Kuroki, Masahiro Numa
A Fully On-Chip, 6.66-kHz, 320-nA, 56ppm/°C, CMOS Relaxation Oscillator with PVT Variation Compensation Circuit. IEICE Trans. Electron. (6) (2014)
Toshihiro Ozaki, Tetsuya Hirose, Takahiro Nagai, Keishi Tsubaki, Nobutaka Kuroki, Masahiro Numa
A 0.21-V minimum input, 73.6% maximum efficiency, fully integrated voltage boost converter with MPPT for low-voltage energy harvesters. ESSCIRC (2014)
Yuzuru Shizuku, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa, Mitsuji Okada
A 24-transistor static flip-flop consisting of nors and inverters for low-power digital vlsis. NEWCAS (2014)
Keishi Tsubaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa
A 32.55-kHz, 472-nW, 120ppm/°C, fully on-chip, variation tolerant CMOS relaxation oscillator for a real-time clock application. ESSCIRC (2013)
Yuji Osaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa
1.2-V Supply, 100-nW, 1.09-V Bandgap and 0.7-V Supply, 52.5-nW, 0.55-V Subbandgap Reference Circuits for Nanowatt CMOS LSIs. IEEE J. Solid State Circuits 48 (6) (2013)
Igors Homjakovs, Tetsuya Hirose, Yuji Osaki, Masanori Hashimoto, Takao Onoye
A 0.8-V 110-nA CMOS current reference circuit using subthreshold operation. IEICE Electron. Express 10 (4) (2013)
Igors Homjakovs, Masanori Hashimoto, Tetsuya Hirose, Takao Onoye
Signal-Dependent Analog-to-Digital Conversion Based on MINIMAX Sampling. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2) (2013)
Yumiko Tsuruya, Tetsuya Hirose, Yuji Osaki, Nobutaka Kuroki, Masahiro Numa, Osamu Kobayashi
A nano-watt power CMOS amplifier with adaptive biasing for power-aware analog LSIs. ESSCIRC (2012)
Keishi Tsubaki, Tetsuya Hirose, Yuji Osaki, Seiichiro Shiga, Nobutaka Kuroki, Masahiro Numa
A 6.66-kHz, 940-nW, 56ppm/°C, fully on-chip PVT variation tolerant CMOS relaxation oscillator. ICECS (2012)
Yuji Osaki, Tetsuya Hirose, Keishi Tsubaki, Nobutaka Kuroki, Masahiro Numa
A low-power single-slope analog-to-digital converter with digital PVT calibration. ICECS (2012)
Igors Homjakovs, Masanori Hashimoto, Takao Onoye, Tetsuya Hirose
Signal-dependent analog-to-digital converter based on MINIMAX sampling. ISOCC (2012)
Yuji Osaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa
A Low-Power Level Shifter With Logic Error Correction for Extremely Low-Voltage Digital CMOS LSIs. IEEE J. Solid State Circuits 47 (7) (2012)
Yuji Osaki, Tetsuya Hirose, Kei Matsumoto, Nobutaka Kuroki, Masahiro Numa
Robust Subthreshold CMOS Digital Circuit Design with On-Chip Adaptive Supply Voltage Scaling Technique. IEICE Trans. Electron. (1) (2011)
Kosuke Isono, Tetsuya Hirose, Keishi Tsubaki, Nobutaka Kuroki, Masahiro Numa
A 18.9-nA standby current comparator with adaptive bias current generator. A-SSCC (2011)
Yuji Osaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa
A 95-nA, 523ppm/°C, 0.6-μW CMOS current reference circuit with subthreshold MOS resistor ladder. ASP-DAC (2011)
Tetsuya Hirose
Ultra-low power and low voltage circuit design for next-generation power-aware LSI applications. ISOCC (2011)
Yuji Osaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa
A level shifter with logic error correction circuit for extremely low-voltage digital CMOS LSIs. ESSCIRC (2011)
Yuji Osaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa
A wide input voltage range level shifter circuit for extremely low-voltage digital LSIs. IEICE Electron. Express 8 (12) (2011)
Kei Matsumoto, Tetsuya Hirose, Yuji Osaki, Nobutaka Kuroki, Masahiro Numa
Subthreshold SRAM with Write Assist Technique Using On-Chip Threshold Voltage Monitoring Circuit. IEICE Trans. Electron. (6) (2011)
Shingo Chikamatsu, Tomohiro Nakaya, Masakazu Kouda, Nobutaka Kuroki, Tetsuya Hirose, Masahiro Numa
Super-resolution technique for thermography with dual-camera system. ISCAS (2010)
Yusuke Tsugita, Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya
An On-Chip PVT Compensation Technique with Current Monitoring Circuit for Low-Voltage CMOS Digital LSIs. IEICE Trans. Electron. (6) (2010)
Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya
hboxC Current Reference Circuit Consisting of Subthreshold CMOS Circuits. IEEE Trans. Circuits Syst. II Express Briefs (9) (2010)
Tetsuya Hirose, Yuji Osaki, Nobutaka Kuroki, Masahiro Numa
A nano-ampere current reference circuit and its temperature dependence control by using temperature characteristics of carrier mobilities. ESSCIRC (2010)
Kosuke Shioki, Narumi Okada, Kosuke Watanabe, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa
An Error Diagnosis Technique Based on Clustering of Elements. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2010)
Kayoko Seto, Masaaki Iijima, Tetsuya Hirose, Masahiro Numa, Akira Tada, Takashi Ipposhi
control. IEICE Electron. Express 6 (8) (2009)
Taichi Ogawa, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya
Threshold-Logic Devices Consisting of Subthreshold CMOS Circuits. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2) (2009)
Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya
A 300 nW, 15 ppm°C, 20 ppm/V CMOS Voltage Reference Circuit Consisting of Subthreshold MOSFETs. IEEE J. Solid State Circuits 44 (7) (2009)
Kosuke Shioki, Narumi Okada, Toshiro Ishihara, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa
An Error Diagnosis Technique Based on Location Sets to Rectify Subcircuits. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2009)
Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya
Low-Voltage Process-Compensated VCO with On-Chip Process Monitoring and Body-Biasing Circuit Techniques. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2009)
Yusuke Tsugita, Ken Ueno, Tetsuya Asai, Yoshihito Amemiya, Tetsuya Hirose
On-chip PVT Compensation Techniques for Low-voltage CMOS Digital LSIs. ISCAS (2009)
Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya
A 300 nW, 7 ppm/degreeC CMOS voltage reference circuit based on subthreshold MOSFETs. ASP-DAC (2009)
Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya
Temperature-compensated CMOS current reference circuit for ultralow-power subthreshold LSIs. IEICE Electron. Express 5 (6) (2008)
Akira Utagawa, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya
Noise-Induced Synchronization among Sub-RF CMOS Analog Oscillators for Skew-Free Clock Distribution. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (9) (2008)
Kazuhito Yamada, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya
On Digital LSI Circuits Exploiting Collision-Based Fusion Gates. Int. J. Unconv. Comput. 4 (1) (2008)
Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya
A 0.3μW, 7 ppm/°C CMOS Voltage reference circuit for on-chip process monitoring in analog circuits. ESSCIRC (2008)
Gessyca Maria Tovar, Eric Shun Fukuda, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya
Neuromorphic CMOS Circuits implementing a Novel Neural Segmentation Model based on Symmetric STDP Learning. IJCNN (2007)
Kazuki Nakada, Tetsuya Asai, Tetsuya Hirose, Hatsuo Hayashi, Yoshihito Amemiya
A subthreshold CMOS circuit for a piecewise linear neuromorphic oscillator with current-mode low-pass filters. Neurocomputing 71 (1-3) (2007)
Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya
CMOS Smart Sensor for Monitoring the Quality of Perishables. IEEE J. Solid State Circuits 42 (4) (2007)
Gessyca Maria Tovar, Eric Shun Fukuda, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya
Analog CMOS Circuits Implementing Neural Segmentation Model Based on Symmetric STDP Learning. ICONIP (2) (2007)
Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya
Floating millivolt reference for PTAT current generation in Subthreshold MOS LSIs. ISCAS (2007)
Motoyoshi Takahashi, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya
A CMOS Reaction-diffusion Device Using Minority-Carrier Diffusion in Semiconductors. Int. J. Bifurc. Chaos 17 (5) (2007)
Akira Utagawa, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya
An Inhibitory Neural-Network Circuit Exhibiting Noise Shaping with Subthreshold MOS Neuron Circuits. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (10) (2007)
Tetsuya Asai, Taishi Kamiya, Tetsuya Hirose, Yoshihito Amemiya
A subthreshold Analog MOS Circuit for Lotka-volterra Chaotic oscillator. Int. J. Bifurc. Chaos 16 (1) (2006)
Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya
Power-supply circuits for ultralow-power subthreshold MOS-LSIs. IEICE Electron. Express 3 (22) (2006)
Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya
A CMOS Watchdog Sensor for Certifying the Quality of Various Perishables with a Wider Activation Energy. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (4) (2006)
Tetsuya Asai, Yusuke Kanazawa, Tetsuya Hirose, Yoshihito Amemiya
Analog Reaction-Diffusion Chip Imitating Belousov-Zhabotinsky Reaction with Hardware Oregonator Model. Int. J. Unconv. Comput. 1 (2) (2005)
Sungwoo Cha, Tetsuya Hirose, Masaki Haruoka, Toshimasa Matsuoka, Kenji Taniguchi
A CMOS IF Variable Gain Amplifier with Exponential Gain Control. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2) (2005)
Tetsuya Hirose, Toshimasa Matsuoka, Kenji Taniguchi, Tetsuya Asai, Yoshihito Amemiya
Ultralow-Power Current Reference Circuit with Low Temperature Dependence. IEICE Trans. Electron. (6) (2005)
Tetsuya Asai, Masayuki Ikebe, Tetsuya Hirose, Yoshihito Amemiya
A quadrilateral-object composer for binary images with reaction-diffusion cellular automata. Parallel Algorithms Appl. 20 (1) (2005)
Yusuke Kanazawa, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya
A MOS circuit for bursting neural oscillators with excitable oregonators. IEICE Electron. Express 1 (4) (2004)
Hiroshi Matsubara, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya
Reaction-diffusion chip implementing excitable lattices with multiple-valued cellular automata. IEICE Electron. Express 1 (9) (2004)
Masayuki Furuhashi, Tetsuya Hirose, Hiroshi Tsuji, Masayuki Tachi, Kenji Taniguchi
Atomic configuration of boron pile-up at the Si/SiO2 interface. IEICE Electron. Express 1 (6) (2004)
Takeo Hosomi, Yasushi Kanoh, Masaaki Nakamura, Tetsuya Hirose
A DSM Architecture for a Parallel Computer Cenju-4. HPCA (2000)
Yasushi Kanoh, Masaaki Nakamura, Tetsuya Hirose, Takeo Hosomi, Hirokazu Takayama, Toshiyuki Nakata
Message Passing Communication in a Parallel Computer Cenju-4. ISHPC (1999)

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Publication Activity (10 Years)

Top Topics

Top Venues

Tetsuya Hirose