A Fully On-Chip, 6.66-kHz, 320-nA, 56ppm/°C, CMOS Relaxation Oscillator with PVT Variation Compensation Circuit.
Keishi TsubakiTetsuya HiroseYuji OsakiSeiichiro ShigaNobutaka KurokiMasahiro NumaPublished in: IEICE Trans. Electron. (2014)
Keyphrases
- analog vlsi
- circuit design
- high speed
- cmos technology
- power dissipation
- chip design
- low power
- nm technology
- power consumption
- silicon on insulator
- low cost
- probabilistic relaxation
- metal oxide semiconductor
- text categorization
- parallel processing
- compression algorithm
- focal plane
- sampling rate
- mixed signal
- digital circuits
- cmos image sensor
- text classification
- evolvable hardware
- low voltage
- iterative algorithms
- differential equations
- single chip
- bayesian classifier