Ippei Akita

Publication Activity (10 Years)

Years Active: 2006-2024
Publications (10 Years): 12

Top Topics

Noise Reduction

Top Venues

IEEE J. Solid State Circuits

Publications

Ippei Akita, Shunichi Tatematsu
3.5 A 4mW 45pT/√Hz Magnetoimpedance-Based ΔΣ Magnetometer with Background Gain Calibration and Short-Time CDS Techniques. ISSCC (2024)
Hiroshi Fuketa, Ippei Akita, Tomohiro Ishikawa, Hanpei Koike, Takahiro Mori
A Cryogenic CMOS Current Integrator and Correlation Double Sampling Circuit for Spin Qubit Readout. IEEE Trans. Circuits Syst. I Regul. Pap. 70 (12) (2023)
Hiroshi Fuketa, Ippei Akita, Tomohiro Ishikawa, Hanpei Koike, Takahiro Mori
A Cryogenic CMOS Current Comparator for Spin Qubit Readout Achieving Fast Readout Time and High Current Resolution. VLSI Technology and Circuits (2022)
Ippei Akita, Takeshi Kawano, Hitoshi Aoyama, Shunichi Tatematsu, Masakazu Hioki
An Automatic Loop Gain Enhancement Technique in Magnetoimpedance-Based Magnetometer. IEEE J. Solid State Circuits 57 (12) (2022)
Ippei Akita, Takeshi Kawano, Hitoshi Aoyama, Shunichi Tatematsu, Masakazu Hioki
A 2.6mW 10pTI √ Hz 33kHz Magnetoimpedance-Based Magnetometer with Automatic Loop-Gain and Bandwidth Enhancement. ISSCC (2022)
Ippei Akita, Takayuki Okazawa, Yoshihiko Kurui, Akira Fujimoto, Takashi Asano
A Feedforward Noise Reduction Technique in Capacitive MEMS Accelerometer Analog Front-End for Ultra-Low-Power IoT Applications. IEEE J. Solid State Circuits 55 (6) (2020)
Dejan Rozgic, Vahagn Hokhikyan, Wenlong Jiang, Ippei Akita, Sina Basir-Kazeruni, Hariprasad Chandrakumar, Dejan Markovic
, Artifact-Free, 64-Contact Neuromodulation Platform for Simultaneous Stimulation and Sensing. IEEE Trans. Biomed. Circuits Syst. 13 (1) (2019)
Yuji Yano, Seiya Yoshida, Shintaro Izumi, Hiroshi Kawaguchi, Tetsuya Hirose, Masaya Miyahara, Teruki Someya, Kenichi Okada, Ippei Akita, Yoshihiko Kurui, Hideyuki Tomizawa, Masahiko Yoshimoto
An IoT Sensor Node SoC with Dynamic Power Scheduling for Sustainable Operation in Energy Harvesting Environment. A-SSCC (2019)
Takayuki Okazawa, Ippei Akita
A Time-Domain Analog Spatial Compressed Sensing Encoder for Multi-Channel Neural Recording. Sensors 18 (1) (2018)
Takayuki Okazawa, Ippei Akita
A Dynamic Latched Comparator Using Area-Efficient Stochastic Offset Voltage Detection Technique. IEICE Trans. Electron. (5) (2018)
Ippei Akita, Takayuki Okazawa, Yoshihiko Kurui, Akira Fujimoto, Takashi Asano
A 181NW 970µG✓HZ Accelerometer Analog Front-End Employing Feedforward Noise Reduction Technique. VLSI Circuits (2018)
Takayuki Okazawa, Ippei Akita
A robust and low-power synchronization technique of coarse-and-fine conversion parts in ring-oscillator-based time-to-digital converters. ICECS (2017)
Ippei Akita, Makoto Ishida
A current noise reduction technique in chopper instrumentation amplifier for high-impedance sensors. IEICE Electron. Express 12 (11) (2015)
Kenji Okabe, Horagodage Prabhath Jeewan, Shota Yamagiwa, Takeshi Kawano, Makoto Ishida, Ippei Akita
Co-Design Method and Wafer-Level Packaging Technique of Thin-Film Flexible Antenna and Silicon CMOS Rectifier Chips for Wireless-Powered Neural Interface Systems. Sensors 15 (12) (2015)
Masanori Furuta, Ippei Akita, Junya Matsuno, Tetsuro Itakura
A 36-mW 1.5-GS/s 7-Bit Time-Interleaved SAR ADC Using Source Follower Based Track-and-Hold Circuit in 65-nm CMOS. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (7) (2013)
Ippei Akita, Makoto Ishida
14nV/√Hz chopper instrumentation amplifier with automatic differential-pair matching. ISSCC (2013)
Ippei Akita, Masanori Furuta, Junya Matsuno, Tetsuro Itakura
A 7-bit 1.5-GS/s time-interleaved SAR ADC with dynamic track-and-hold amplifier. A-SSCC (2011)
Ippei Akita, Yuta Tsubouchi, Tetsuro Itakura, Michihiko Nishigaki, Hiroshi Uemura, Hideto Furuyama, Hideki Shibata
A 6Gbps 3mW optical receiver with DCOC-combined ATC in 65nm CMOS. ESSCIRC (2011)
Ippei Akita, Tetsuro Itakura, Kei Shiraishi
Current-Steering Digital-to-Analog Converter With a High-PSRR Current Switch. IEEE Trans. Circuits Syst. II Express Briefs (11) (2011)
Ippei Akita, Kazuyuki Wada, Yoshiaki Tadokoro
A 0.6-V Dynamic Biasing Filter With 89-dB Dynamic Range in 0.18-µm CMOS. IEEE J. Solid State Circuits 44 (10) (2009)
Ippei Akita, Kazuyuki Wada, Yoshiaki Tadokoro
A 0.8-V Syllabic-Companding Log Domain Filter with 78-dB Dynamic Range in 0.35-µm CMOS. IEICE Trans. Electron. (1) (2008)
Ippei Akita, Kazuyuki Wada, Yoshiaki Tadokoro
Simplified Low-Voltage CMOS Syllabic Companding Log Domain Filter. ISCAS (2007)
Ippei Akita, Kazuyuki Wada, Yoshiaki Tadokoro
Synthesis Method of All Low-Voltage CMOS Instantaneous-Companding Log Domain Integrators. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2) (2007)
Ippei Akita, Kazuyuki Wada, Yoshiaki Tadokoro
Low-voltage CMOS syllabic-companding log domain filter. ISCAS (2006)