Yuji Yano

Publication Activity (10 Years)

Years Active: 2003-2022
Publications (10 Years): 14

Top Topics

Spectral Analysis

Autoregressive Model

Top Venues

IEICE Trans. Commun.

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Yuji Yano, Hisashi Iwamoto, Takuma Yoshimura, Yoshihiro Nishida, Tatsuya Mori, Kiyotaka Komoku, Hidekuni Takao, Kazutami Arimoto
28-m W Fully Embedded AI Techniques with On-site Learning for Low-Power Handy Tactile Sensing System. VLSI-DAT (2022)
Kento Watanabe, Shintaro Izumi, Yuji Yano, Hiroshi Kawaguchi, Masahiko Yoshimoto
Heartbeat Interval Error Compensation Method for Low Sampling Rates Photoplethysmography Sensors. IEICE Trans. Commun. (6) (2020)
Daisuke Watanabe, Yuji Yano, Shintaro Izumi, Hiroshi Kawaguchi, Kiyoshi Takeuchi, Toshiro Hiramoto, Shoichi Iwai, Masami Murakata, Masahiko Yoshimoto
An Architectural Study for Inference Coprocessor Core at the Edge in IoT Sensing. AICAS (2020)
Seiya Yoshida, Shintaro Izumi, Koichi Kajihara, Yuji Yano, Hiroshi Kawaguchi, Masahiko Yoshimoto
Energy-Efficient Spectral Analysis Method Using Autoregressive Model-Based Approach for Internet of Things. IEEE Trans. Circuits Syst. I Regul. Pap. (10) (2019)
Kana Sasai, Shintaro Izumi, Kento Watanabe, Yuji Yano, Hiroshi Kawaguchi, Masahiko Yoshimoto
A Low-Power Photoplethysmography Sensor using Correlated Double Sampling and Reference Readout Circuit. IEEE SENSORS (2019)
Kento Watanabe, Shintaro Izumi, Kana Sasai, Yuji Yano, Hiroshi Kawaguchi, Masahiko Yoshimoto
Low-Noise Photoplethysmography Sensor Using Correlated Double Sampling for Heartbeat Interval Acquisition. IEEE Trans. Biomed. Circuits Syst. 13 (6) (2019)
Yuji Yano, Seiya Yoshida, Shintaro Izumi, Hiroshi Kawaguchi, Tetsuya Hirose, Masaya Miyahara, Teruki Someya, Kenichi Okada, Ippei Akita, Yoshihiko Kurui, Hideyuki Tomizawa, Masahiko Yoshimoto
An IoT Sensor Node SoC with Dynamic Power Scheduling for Sustainable Operation in Energy Harvesting Environment. A-SSCC (2019)
Seiya Yoshida, Shintaro Izumi, Yuki Nishikawa, Kento Watanabe, Kana Sasai, Yuji Yano, Hiroshi Kawaguchi, Masahiko Yoshimoto
A Heartbeat Interval Error Compensation Method Using Multiple Linear Regression for Photoplethysmography Sensors. BioCAS (2019)
Yuki Nishikawa, Shintaro Izumi, Yuji Yano, Hiroshi Kawaguchi, Masahiko Yoshimoto
Sampling Rate Reduction for Wearable Heart Rate Variability Monitoring. ISCAS (2018)
Yuji Yano
A 5-ms Error, 22-μA Photoplethysmography Sensor using Current Integration Circuit and Correlated Double Sampling. EMBC (2018)
Koichi Kajihara, Shintaro Izumi, Seiya Yoshida, Yuji Yano, Hiroshi Kawaguchi, Masahiko Yoshimoto
Hardware Implementation of Autoregressive Model Estimation Using Burg's Method for Low-Energy Spectral Analysis. SiPS (2018)
Kazunari Inoue, Yuji Yano
A large scale access-control list for IoT security comprising embedded IP-core and DDR DRAM. ISOCC (2016)
Hideaki Furukawa, Hiroaki Harai, Yasuto Kuroda, Yuji Yano, Shoji Koyama
Demonstration of 100 Gbps optical packet switching using header processor based on 48-bit longest prefix matching. Photonic Netw. Commun. 31 (3) (2016)
Masami Nawa, Kenzo Okuda, Shingo Ata, Yasuto Kuroda, Yuji Yano, Hisashi Iwamoto, Kazunari Inoue, Ikuo Oka
Energy-efficient high-speed search engine using a multi-dimensional TCAM architecture with parallel pipelined subdivided structure. CCNC (2016)
Yuji Yano, Tomonori Hashiyama, Junko Ichino, Shun'ichi Tano
Behavior extraction from tweets using character N-gram models. FUZZ-IEEE (2014)
Hisashi Iwamoto, Yuji Yano, Yasuto Kuroda, Koji Yamamoto, Kazunari Inoue, Ikuo Oka
A 250 Msps, 0.5 W eDRAM-Based Search Engine Dedicated Low Power FIB Application. IEICE Trans. Electron. (8) (2013)
Hisashi Iwamoto, Yuji Yano, Yasuto Kuroda, Koji Yamamoto, Shingo Ata, Kazunari Inoue
Deterministic Packet Buffer System with Multi FIFO Queues for the Advanced QoS. IEICE Trans. Commun. (7) (2013)
Sou Koyano, Shingo Ata, Hisashi Iwamoto, Yuji Yano, Yasuto Kuroda, Kazunari Inoue, Ikuo Oka
A study on micro level traffic prediction for energy-aware routers. ACM SIGOPS Oper. Syst. Rev. 47 (3) (2013)
Isamu Hayashi, Teruhiko Amano, Naoya Watanabe, Yuji Yano, Yasuto Kuroda, M. Shirata, Katsumi Dosaka, Koji Nii, Hideyuki Noda, Hiroyuki Kawai
A 250-MHz 18-Mb Full Ternary CAM With Low-Voltage Matchline Sensing Scheme in 65-nm CMOS. IEEE J. Solid State Circuits 48 (11) (2013)
Kenzo Okuda, Shingo Ata, Yasuto Kuroda, Yuji Yano, Hisashi Iwamoto, Kazunari Inoue, Ikuo Oka
2D Sliced Packet Buffer with traffic volume and buffer occupancy adaptation for power saving. CCNC (2013)
Satoshi Uemori, Masamichi Ishii, Haruo Kobayashi, Daiki Hirabayashi, Yuta Arakawa, Yuta Doi, Osamu Kobayashi, Tatsuji Matsuura, Kiichi Niitsu, Yuji Yano, Tatsuhiro Gake, Takahiro J. Yamaguchi, Nobukazu Takai
Multi-bit Sigma-Delta TDC Architecture with Improved Linearity. J. Electron. Test. 29 (6) (2013)
Yasuto Kuroda, Yuji Yano, Hisashi Iwamoto, Koji Yamamoto, Kazunari Inoue, Masahiro Suzuki
A 200Msps, 0.6W eDRAM-based search engine applying full-route capacity dedicated FIB application. CICC (2012)
Satoshi Uemori, Masamichi Ishii, Haruo Kobayashi, Yuta Doi, Osamu Kobayashi, Tatsuji Matsuura, Kiichi Niitsu, Yuta Arakawa, Daiki Hirabayashi, Yuji Yano, Tatsuhiro Gake, Nobukazu Takai, Takahiro J. Yamaguchi
Multi-bit sigma-delta TDC architecture with self-calibration. APCCAS (2012)
Hisashi Iwamoto, Yuji Yano, Yasuto Kuroda, Koji Yamamoto, Shingo Ata, Kazunari Inoue
Deterministic High Density Packet-Buffer System for Low Cost Network Systems. AINA (2012)
Yuji Yano, Hisashi Iwamoto, Yasuto Kuroda, Shiro Ohtani, Shingo Ata, Kazunari Inoue
A slice structure using the management of network traffic prediction for green IT. HPSR (2012)
Yuji Yano, Tetsushi Koide, Hans Jürgen Mattausch
Associative memory with fully parallel nearest-Manhattan-distance search for low-power real-time single-chip applications. ASP-DAC (2004)
Tetsushi Koide, Hans Jürgen Mattausch, Yuji Yano, Takayuki Gyohten, Yoshihiro Soda
A nearest-hamming-distance search memory with fully parallel mixed digital-analog match circuitry. ASP-DAC (2003)