Login / Signup
A Low-Power Photoplethysmography Sensor using Correlated Double Sampling and Reference Readout Circuit.
Kana Sasai
Shintaro Izumi
Kento Watanabe
Yuji Yano
Hiroshi Kawaguchi
Masahiko Yoshimoto
Published in:
IEEE SENSORS (2019)
Keyphrases
</>
low power
high speed
logic circuits
image sensor
cmos technology
power consumption
low cost
power reduction
power dissipation
gate array
delay insensitive
vlsi circuits
single chip
vlsi architecture
high power
real time
wireless transmission
mixed signal
wide dynamic range
nm technology
sensor data
cmos image sensor
low power consumption
digital signal processing
sensor networks
ultra low power
signal processor
low voltage