A Low-Power Level Shifter With Logic Error Correction for Extremely Low-Voltage Digital CMOS LSIs.
Yuji OsakiTetsuya HiroseNobutaka KurokiMasahiro NumaPublished in: IEEE J. Solid State Circuits (2012)
Keyphrases
- error correction
- low power
- mixed signal
- low voltage
- cmos technology
- vlsi circuits
- power consumption
- low cost
- high speed
- logic circuits
- digital circuits
- multi channel
- delay insensitive
- single chip
- power management
- image sensor
- channel coding
- digital signal processing
- error detection
- watermarking scheme
- low power consumption
- cmos image sensor
- analog to digital converter
- low density parity check
- parallel processing
- data hiding
- power dissipation
- energy efficiency