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Sub-1-μs start-up time, 32-MHz relaxation oscillator for low-power intermittent VLSI systems.
Hiroki Asano
Tetsuya Hirose
Taro Miyoshi
Keishi Tsubaki
Toshihiro Ozaki
Nobutaka Kuroki
Masahiro Numa
Published in:
ASP-DAC (2017)
Keyphrases
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low power
high speed
vlsi circuits
single chip
power consumption
low cost
cmos technology
gate array
vlsi architecture
computer systems
logic circuits
high power
wireless transmission
distributed systems
high frequency
short range
power dissipation
power reduction
mixed signal
signal processor
nm technology