On-chip PVT Compensation Techniques for Low-voltage CMOS Digital LSIs.
Yusuke TsugitaKen UenoTetsuya AsaiYoshihito AmemiyaTetsuya HirosePublished in: ISCAS (2009)
Keyphrases
- low voltage
- mixed signal
- cmos technology
- random access memory
- low power
- multi channel
- design considerations
- power line
- cmos image sensor
- circuit design
- power management
- power consumption
- single chip
- analog to digital converter
- leakage current
- analog vlsi
- high speed
- low cost
- video sequences
- image sensor
- hardware and software
- machine vision
- parallel processing
- metal oxide semiconductor