Ran Wang

ORCID

Publication Activity (10 Years)

Years Active: 2013-2022
Publications (10 Years): 15

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

VTS

ATS

ACM Trans. Design Autom. Electr. Syst.

Duke University, Durham, NC, USA (PHD)

Education History

Duke University, Durham, NC, USA

PHD

Publications

Qiang Wu, Ran Wang, Xincheng Yan, Chunming Wu, Rongxing Lu
Intrinsic Security: A Robust Framework for Cloud-Native Network Slicing via a Proactive Defense Paradigm. IEEE Wirel. Commun. 29 (2) (2022)
Shengcheng Wang, Ran Wang, Krishnendu Chakrabarty, Mehdi Baradaran Tahoori
Multicast Testing of Interposer-Based 2.5D ICs: Test-Architecture Design and Test Scheduling. ACM Trans. Design Autom. Electr. Syst. 23 (3) (2018)
Ran Wang, Zipeng Li, Sukeshwar Kannan, Krishnendu Chakrabarty
Prebond Testing and Test-Path Design for the Silicon Interposer in 2.5-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36 (8) (2017)
Ran Wang, Krishnendu Chakrabarty
Tackling Test Challenges for Interposer-Based 2.5-D Integrated Circuits. IEEE Des. Test 34 (5) (2017)
Ran Wang, Guoliang Li, Rui Li, Jun Qian, Krishnendu Chakrabarty
ExTest Scheduling and Optimization for 2.5-D SoCs With Wrapped Tiles. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36 (6) (2017)
Ran Wang, Krishnendu Chakrabarty
Testing of interposer-based 2.5D integrated circuits. ITC (2016)
Shengcheng Wang, Ran Wang, Krishnendu Chakrabarty, Mehdi Baradaran Tahoori
Multicast Test Architecture and Test Scheduling for Interposer-Based 2.5D ICs. ATS (2016)
Ran Wang, Krishnendu Chakrabarty
A design-for-test solution for monolithic 3D integrated circuits. ETS (2016)
Ran Wang, Krishnendu Chakrabarty
Testing of Interposer-Based 2.5D Integrated Circuits: Challenges and Solutions. ATS (2016)
Ran Wang, Zipeng Li, Sukeshwar Kannan, Krishnendu Chakrabarty
Pre-bond testing of the silicon interposer in 2.5D ICs. DATE (2016)
Ran Wang, Sergej Deutsch, Mukesh Agrawal, Krishnendu Chakrabarty
The hype, myths, and realities of testing 3D integrated circuits. ICCAD (2016)
Ran Wang, Bonita Bhaskaran, Karthikeyan Natarajan, Ayub Abdollahian, Kaushik Narayanun, Krishnendu Chakrabarty, Amit Sanghani
A programmable method for low-power scan shift in SoC integrated circuits. VTS (2016)
Ran Wang, Krishnendu Chakrabarty, Sudipta Bhawmik
Built-In Self-Test and Test Scheduling for Interposer-Based 2.5D IC. ACM Trans. Design Autom. Electr. Syst. 20 (4) (2015)
Ran Wang, Krishnendu Chakrabarty, Sudipta Bhawmik
Interconnect Testing and Test-Path Scheduling for Interposer-Based 2.5-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34 (1) (2015)
Ran Wang, Guoliang Li, Rui Li, Jun Qian, Krishnendu Chakrabarty
ExTest scheduling for 2.5D system-on-chip integrated circuits. VTS (2015)
Krishnendu Chakrabarty, Mukesh Agrawal, Sergej Deutsch, Brandon Noia, Ran Wang, Fangming Ye
Test and Design-for-Testability Solutions for 3D Integrated Circuits. IPSJ Trans. Syst. LSI Des. Methodol. 7 (2014)
Ran Wang, Zhaobo Zhang, Xrysovalantis Kavousianos, Yiorgos Tsiatouhas, Krishnendu Chakrabarty
Built-In Self-Test, Diagnosis, and Repair of MultiMode Power Switches. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33 (8) (2014)
Ran Wang, Krishnendu Chakrabarty, Sudipta Bhawmik
At-speed interconnect testing and test-path optimization for 2.5D ICs. VTS (2014)
Ran Wang, Krishnendu Chakrabarty, Sudipta Bhawmik
Built-in self-test for interposer-based 2.5D ICs. ICCD (2014)
Ran Wang, Krishnendu Chakrabarty, Bill Eklow
Scan-Based Testing of Post-Bond Silicon Interposer Interconnects in 2.5-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33 (9) (2014)
Ran Wang, Krishnendu Chakrabarty, Bill Eklow
Post-bond Testing of the Silicon Interposer and Micro-bumps in 2.5D ICs. Asian Test Symposium (2013)

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Publication Activity (10 Years)

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Ran Wang