Amit Sanghani

Publication Activity (10 Years)

Years Active: 2011-2016
Publications (10 Years): 4

Top Topics

Power Reduction

Integrated Circuit

Layered Architecture

Top Venues

Publications

Milind Sonawane, Pavan Kumar Datla Jagannadha, Sailendra Chadalavada, Shantanu Sarangi, Mahmut Yilmaz, Amit Sanghani, Karthikeyan Natarajan, Jonathon E. Colburn, Anubhav Sinha
Dynamic docking architecture for concurrent testing and peak power reduction. VTS (2016)
Bonita Bhaskaran, Amit Sanghani, Kaushik Narayanun, Ayub Abdollahian, Amit Laknaur
Test method and scheme for low-power validation in modern SOC integrated circuits. VTS (2016)
Ran Wang, Bonita Bhaskaran, Karthikeyan Natarajan, Ayub Abdollahian, Kaushik Narayanun, Krishnendu Chakrabarty, Amit Sanghani
A programmable method for low-power scan shift in SoC integrated circuits. VTS (2016)
Milind Sonawane, Sailendra Chadalavada, Shantanu Sarangi, Amit Sanghani, Mahmut Yilmaz, Pavan Kumar Datla Jagannadha, Jonathon E. Colburn
Flexible scan interface architecture for complex SoCs. VTS (2016)
Bo Yang, Amit Sanghani, Shantanu Sarangi, Chunsheng Liu
A clock-gating based capture power droop reduction methodology for at-speed scan testing. DATE (2011)
Amit Sanghani, Bo Yang, Karthikeyan Natarajan, Chunsheng Liu
Design and implementation of a time-division multiplexing scan architecture using serializer and deserializer in GPU chips. VTS (2011)