Guoliang Li

Publication Activity (10 Years)

Years Active: 2012-2021
Publications (10 Years): 5

Top Topics

Dynamic Optimization

Integrated Circuit

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Asian Test Symposium

Publications

Zhanwei Zhong, Guoliang Li, Qinfu Yang, Krishnendu Chakrabarty
Access-Time Minimization for the IJTAG Network Using Data Broadcast and Hardware Parallelism. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40 (1) (2021)
Zhanwei Zhong, Guoliang Li, Qinfu Yang, Jun Qian, Krishnendu Chakrabarty
Broadcast-based minimization of the overall access time for the IEEE 1687 network. VTS (2018)
Zhanwei Zhong, Guoliang Li, Qinfu Yang, Krishnendu Chakrabarty
Access-Time Minimization in the IEEE 1687 Network Using Broadcast and Hardware Parallelism. ITC (2018)
Guoliang Li, Henry Zhao, Qinfu Yang, Jun Qian, Yu Huang
Industrial Case Studies of SoC Test Scheduling Optimization by Selecting Appropriate EDT Architectures. ITC-Asia (2018)
Ran Wang, Guoliang Li, Rui Li, Jun Qian, Krishnendu Chakrabarty
ExTest Scheduling and Optimization for 2.5-D SoCs With Wrapped Tiles. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36 (6) (2017)
Ran Wang, Guoliang Li, Rui Li, Jun Qian, Krishnendu Chakrabarty
ExTest scheduling for 2.5D system-on-chip integrated circuits. VTS (2015)
Guoliang Li, Jun Qian, Qinfu Yang, Yuan Zuo, Rui Li, Yu Huang, Mark Kassab, Janusz Rajski
Hybrid Hierarchical and Modular Tests for SoC Designs. NATW (2015)
Guoliang Li, Jun Qian, Yuan Zuo, Rui Li, Qinfu Yang
Scan Test Data Volume Reduction for SoC Designs in EDT Environment. Asian Test Symposium (2013)
Guoliang Li, Jun Qian, Peter Li, Greg Zuo
Multi-level EDT to Reduce Scan Channels in SoC Designs. Asian Test Symposium (2012)