Paul D. Franzon

ORCID

Publication Activity (10 Years)

Years Active: 1987-2024
Publications (10 Years): 42

Top Venues

3DIC

MLCAD

IEEE Trans. Very Large Scale Integr. Syst.

CoRR

Publications

Nirjhor Rouf, Fin Amin, Paul D. Franzon
Can Low-Rank Knowledge Distillation in LLMs be Useful for Microelectronic Reasoning? CoRR (2024)
Fin Amin, Nirjhor Rouf, Tse-Han Pan, Md Kamal Ibn Shafi, Paul D. Franzon
Large Reasoning Models for 3D Floorplanning in EDA: Learning from Imperfections. CoRR (2024)
Luis Francisco, W. Rhett Davis, Paul D. Franzon
A Deep Transfer Learning Design Rule Checker With Synthetic Training. IEEE Des. Test 40 (1) (2023)
Joshua A. Stevens, Tse-Han Pan, Prasanth Prabu Ravichandiran, Paul D. Franzon
Chiplet Set For Artificial Intelligence. 3DIC (2023)
Pouria Zaghari, Sourish S. Sinha, Jong Eun Ryu, Paul D. Franzon, Douglas C. Hopkins
Thermal Cycling and Fatigue Life Analysis of a Laterally Conducting GaN-based Power Package. 3DIC (2023)
Fin Amin, Soumyadeep Chatterjee, Paul D. Franzon
DepthGraphNet: Circuit Graph Isomorphism Detection via Siamese-Graph Neural Networks. MLCAD (2023)
Priyank Kashyap, Prasanth Prabu Ravichandiran, Lee Wang, Dror Baron, Chau-Wai Wong, Tianfu Wu, Paul D. Franzon
Thermal Estimation for 3D-ICs Through Generative Networks. 3DIC (2023)
Theodros Nigussie, Joshua Schabel, Steve Lipa, Lisa G. McIlrath, Robert Patti, Paul D. Franzon
Design Obfuscation Through 3-D Split Fabrication With Smart Partitioning. IEEE Trans. Very Large Scale Integr. Syst. 30 (9) (2022)
Haifeng Wang, Zheng Li, Yong Liu, Xiang Chen, Paul D. Franzon, Yuxiaoyang Cai, Luxi Fan
Can Higher-Order Mutants Improve the Performance of Mutation-Based Fault Localization? IEEE Trans. Reliab. 71 (2) (2022)
Priyank Kashyap, Archit Gajjar, Yongjin Choi, Chau-Wai Wong, Dror Baron, Tianfu Wu, Chris Cheng, Paul D. Franzon
RxGAN: Modeling High-Speed Receiver through Generative Adversarial Networks. MLCAD (2022)
Archit Gajjar, Priyank Kashyap, Aydin Aysu, Paul D. Franzon, Sumon Dey, Chris Cheng
FAXID: FPGA-Accelerated XGBoost Inference for Data Centers using HLS. FCCM (2022)
Weifu Li, Paul D. Franzon, Sumon Dey, Joshua Schabel
Hardware Implementation of Hierarchical Temporal Memory Algorithm. ACM J. Emerg. Technol. Comput. Syst. 18 (1) (2022)
Yuejiang Wen, Jacob Dean, Brian A. Floyd, Paul D. Franzon
High Dimensional Optimization for Electronic Design. MLCAD (2022)
Sumon Dey, Lee Baker, Joshua Schabel, Weifu Li, Paul D. Franzon
A Scalable Cluster-based Hierarchical Hardware Accelerator for a Cortically Inspired Algorithm. ACM J. Emerg. Technol. Comput. Syst. 17 (4) (2021)
Prasanth Prabu Ravichandiran, Paul D. Franzon
A Review of 3D-Dynamic Random-Access Memory based Near-Memory Computation. 3DIC (2021)
Lee Baker, Robert Patti, Paul D. Franzon
Multi-ANN embedded system based on a custom 3D-DRAM. 3DIC (2021)
Priyank Kashyap, Furkan Aydin, Seetal Potluri, Paul D. Franzon, Aydin Aysu
2Deep: Enhancing Side-Channel Attacks on Lattice-Based Key-Exchange via 2-D Deep Learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40 (6) (2021)
W. Rhett Davis, Paul D. Franzon, Luis Francisco, Billy Huggins, Rajeev Jain
Fast and Accurate PPA Modeling with Transfer Learning. ICCAD (2021)
Luis Francisco, Paul D. Franzon, W. Rhett Davis
Fast and Accurate PPA Modeling with Transfer Learning. MLCAD (2021)
Francesco Regazzoni, Shivam Bhasin, Amir Alipour, Ihab Alshaer, Furkan Aydin, Aydin Aysu, Vincent Beroulle, Giorgio Di Natale, Paul D. Franzon, David Hély, Naofumi Homma, Akira Ito, Dirmanto Jap, Priyank Kashyap, Ilia Polian, Seetal Potluri, Rei Ueno, Elena Ioana Vatajelu, Ville Yli-Mäyry
Machine Learning and Hardware security: Challenges and Opportunities -Invited Talk-. ICCAD (2020)
Luis Francisco, Tanmay Lagare, Arpit Jain, Somal Chaudhary, Madhura Kulkarni, Divya Sardana, W. Rhett Davis, Paul D. Franzon
Design Rule Checking with a CNN Based Feature Extractor. MLCAD (2020)
Luis Francisco, Tanmay Lagare, Arpit Jain, Somal Chaudhary, Madhura Kulkarni, Divya Sardana, W. Rhett Davis, Paul D. Franzon
Design Rule Checking with a CNN Based Feature Extractor. CoRR (2020)
Isaac Turtletaub, George Li, Mohannad Ibrahim, Paul D. Franzon
Application of Quantum Machine Learning to VLSI Placement. MLCAD (2020)
Yi Wang, Paul D. Franzon, David Smart, Brian Swahn
Multi-Fidelity Surrogate-Based Optimization for Electromagnetic Simulation Acceleration. ACM Trans. Design Autom. Electr. Syst. 25 (5) (2020)
Furkan Aydin, Priyank Kashyap, Seetal Potluri, Paul D. Franzon, Aydin Aysu
DeePar-SCA: Breaking Parallel Architectures of Lattice Cryptography via Learning Based Side-Channel Attacks. SAMOS (2020)
Sumon Dey, Paul D. Franzon
An Application Specific Processor Architecture with 3D Integration for Recurrent Neural Networks. ISQED (2019)
Jong Beom Park, William Rhett Davis, Paul D. Franzon
3-D-DATE: A Circuit-Level Three-Dimensional DRAM Area, Timing, and Energy Model. IEEE Trans. Circuits Syst. I Regul. Pap. (2) (2019)
Sung-Wook Park, Lee Baker, Paul D. Franzon
Appliance Identification Algorithm for a Non-Intrusive Home Energy Monitor Using Cogent Confabulation. IEEE Trans. Smart Grid 10 (1) (2019)
T. Robert Harris, W. Rhett Davis, Steven Lipa, W. Shepherd Pitts, Paul D. Franzon
Vertical Stack Thermal Characterization of Heterogeneous Integration and Packages. 3DIC (2019)
Zhao Wang, Aranya Chakrabortty, C. T. Kelley, Xiaoming Feng, Paul D. Franzon
Improved Numerical Methodologies on Power System Dynamic Simulation Using GPU Implementation. ISGT (2019)
Billy Huggins, W. Rhett Davis, Paul D. Franzon
Estimating Pareto Optimum Fronts to Determine Knob Settings in Electronic Design Automation Tools. ISQED (2019)
Wenxu Zhao, Peter Gadfort, Kirti Bhanushali, Paul D. Franzon
RF-Only Logic: an Area Efficient Logic Family for RF-Power Harvesting Applications. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2018)
Joshua Schabel, Paul D. Franzon
Exploring the Tradeoffs of Application-Specific Processing. IEEE J. Emerg. Sel. Topics Circuits Syst. 8 (3) (2018)
Eric J. Wyers, Weiyi Qi, Paul D. Franzon
A robust calibration and supervised machine learning reliability framework for digitally-assisted self-healing RFICs. MWSCAS (2017)
Vinesh Srinivasan, Rangeen Basu Roy Chowdhury, Elliott Forbes, Randy Widialaksono, Zhenqian Zhang, Joshua Schabel, Sungkwan Ku, Steve Lipa, Eric Rotenberg, W. Rhett Davis, Paul D. Franzon
H3 (Heterogeneity in 3D): A Logic-on-Logic 3D-Stacked Heterogeneous Multi-Core Processor. ICCD (2017)
HoonSeok Kim, Chanyoun Won, Paul D. Franzon
Corrections to "Crosstalk-Canceling Multimode Interconnect Using Transmitter Encoding". IEEE Trans. Very Large Scale Integr. Syst. 25 (5) (2017)
Weifu Li, Paul D. Franzon
Hardware implementation of Hierarchical Temporal Memory algorithm. SoCC (2016)
Wenxu Zhao, Kirti Bhanushali, Paul D. Franzon
Design of a rectifier-free UHF Gen-2 compatible RFID Tag using RF-only logic. IEEE RFID (2016)
Joshua Schabel, Lee Baker, Sumon Dey, Weifu Li, Paul D. Franzon
Processor-in-memory support for artificial neural networks. ICRC (2016)
Eric J. Wyers, Matthew A. Morton, T. C. L. Gerhard Sollner, C. T. Kelley, Paul D. Franzon
A Generally Applicable Calibration Algorithm for Digitally Reconfigurable Self-Healing RFICs. IEEE Trans. Very Large Scale Integr. Syst. 24 (3) (2016)
Sumon Dey, Paul D. Franzon
Design and ASIC acceleration of cortical algorithm for text recognition. SoCC (2016)
Randy Widialaksono, Rangeen Basu Roy Chowdhury, Zhenqian Zhang, Joshua Schabel, Steve Lipa, Eric Rotenberg, W. Rhett Davis, Paul D. Franzon
Physical design of a 3D-stacked heterogeneous multi-core processor. 3DIC (2016)
Eric J. Wyers, T. Robert Harris, Wallace Shep Pitts, Jordan E. Massad, Paul D. Franzon
Characterization of the mechanical stress impact on device electrical performance in the CMOS and III-V HEMT/HBT heterogeneous integration environment. 3DIC (2015)
Paul D. Franzon, Eric Rotenberg, James Tuck, W. Rhett Davis, Huiyang Zhou, Joshua Schabel, Zhenqian Zhang, J. Brandon Dwiel, Elliott Forbes, Joonmoo Huh, Steve Lipa
Computing in 3D. CICC (2015)
Paul D. Franzon, Eric Rotenberg, James Tuck, W. Rhett Davis, Huiyang Zhou, Joshua Schabel, Zhenqian Zhang, J. Brandon Dwiel, Elliott Forbes, Joonmoo Huh, Marcus Tshibangu, Steve Lipa
Computing in 3D. 3DIC (2015)
Elliott Forbes, Zhenqian Zhang, Randy Widialaksono, Brandon H. Dwiel, Rangeen Basu Roy Chowdhury, Vinesh Srinivasan, Steve Lipa, Eric Rotenberg, W. Rhett Davis, Paul D. Franzon
Under 100-cycle thread migration latency in a single-ISA heterogeneous multi-core processor. Hot Chips Symposium (2015)
T. Robert Harris, Eric J. Wyers, Lee Wang, Samuel Graham, Georges Pavlidis, Paul D. Franzon, W. Rhett Davis
Thermal simulation of heterogeneous GaN/ InP/silicon 3DIC stacks. 3DIC (2015)
Paul D. Franzon, Eric Rotenberg, James Tuck, Huiyang Zhou, W. Rhett Davis, Hongwen Dai, Joonmoo Huh, Sungkwan Ku, Steve Lipa, Chao Li, Jong Beom Park, Joshua Schabel
3D-enabled customizable embedded computer (3DECC). 3DIC (2014)
Randy Widialaksono, Wenxu Zhao, W. Rhett Davis, Paul D. Franzon
Leveraging 3D-IC for on-chip timing uncertainty measurements. 3DIC (2014)
T. Robert Harris, Paul D. Franzon, W. Rhett Davis, Lee Wang
Thermal effects of heterogeneous interconnects on InP / GaN / Si diverse integrated circuits. 3DIC (2014)
Ojas A. Bapat, Paul D. Franzon, Richard M. Fastow
A Generic and Scalable Architecture for a Large Acoustic Model and Large Vocabulary Speech Recognition Accelerator Using Logic on Memory. IEEE Trans. Very Large Scale Integr. Syst. 22 (12) (2014)
Shivam Priyadarshi, W. Rhett Davis, Paul D. Franzon
Pathfinder3D: A framework for exploring early thermal tradeoffs in 3DIC. ICICDT (2014)
Nyunyi M. Tshibangu, Paul D. Franzon, Eric Rotenberg, William Rhett Davis
Design of controller for L2 cache mapped in Tezzaron stacked DRAM. 3DIC (2013)
HoonSeok Kim, Chanyoun Won, Paul D. Franzon
Crosstalk-Canceling Multimode Interconnect Using Transmitter Encoding. IEEE Trans. Very Large Scale Integr. Syst. 21 (8) (2013)
Eric J. Wyers, Michael B. Steer, C. T. Kelley, Paul D. Franzon
A Bounded and Discretized Nelder-Mead Algorithm Suitable for RFIC Calibration. IEEE Trans. Circuits Syst. I Regul. Pap. (7) (2013)
Zhenqian Zhang, Brandon Noia, Krishnendu Chakrabarty, Paul D. Franzon
Face-to-face bus design with built-in self-test in 3D ICs. 3DIC (2013)
Edward J. Suh, Paul D. Franzon
Design of 60 GHz contactless probe system for RDL in passive silicon interposer. 3DIC (2013)
Paul D. Franzon, Shivam Priyadarshi, Steve Lipa, W. Rhett Davis, Thorlindur Thorolfsson
Exploring early design tradeoffs in 3DIC. ISCAS (2013)
Zhenqian Zhang, Paul D. Franzon
TSV-based, modular and collision detectable face-to-back shared bus design. 3DIC (2013)
Paul D. Franzon, Avi Bar-Cohen
Thermal requirements in future 3D processors. 3DIC (2013)
Paul D. Franzon
MOOCs, OOCs, flips and hybrids: The new world of higher education. MSE (2013)
Shivam Priyadarshi, Niket K. Choudhary, Brandon H. Dwiel, Ankita Upreti, Eric Rotenberg, William Rhett Davis, Paul D. Franzon
3D integration: A scheme for optimizing efficiency/cost of Chip Multiprocessors. ISQED (2013)
Eric Rotenberg, Brandon H. Dwiel, Elliott Forbes, Zhenqian Zhang, Randy Widialaksono, Rangeen Basu Roy Chowdhury, Nyunyi M. Tshibangu, Steve Lipa, W. Rhett Davis, Paul D. Franzon
Rationale for a 3D heterogeneous multi-core processor. ICCD (2013)
Ting Zhu, Michael B. Steer, Paul D. Franzon
Surrogate Model-Based Self-Calibrated Design for Process and Temperature Compensation in Analog/RF Circuits. IEEE Des. Test 29 (6) (2012)
Mustafa Berke Yelten, Paul D. Franzon, Michael B. Steer
Process mismatch analysis based on reduced-order models. ISQED (2012)
Shivam Priyadarshi, T. Robert Harris, Samson Melamed, Carlos Tadeo Ortega Otero, Nikhil Kriplani, Carlos E. Christoffersen, Rajit Manohar, Steven R. Dooley, W. Rhett Davis, Paul D. Franzon, Michael B. Steer
Dynamic electrothermal simulation of three-dimensional integrated circuits using standard cell macromodels. IET Circuits Devices Syst. 6 (1) (2012)
Samson Melamed, Thorlindur Thorolfsson, T. Robert Harris, Shivam Priyadarshi, Paul D. Franzon, Michael B. Steer, W. Rhett Davis
Junction-Level Thermal Analysis of 3-D Integrated Circuits Using High Definition Power Blurring. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31 (5) (2012)
Thorlindur Thorolfsson, Steve Lipa, Paul D. Franzon
A 10.35 mW/GFlop stacked SAR DSP unit using fine-grain partitioned 3D integration. CICC (2012)
Neil Di Spigna, Daniel Schinke, Srikant Jayanti, Veena Misra, Paul D. Franzon
Simulation and Experimental Characterization of a Unified Memory Device with Two Floating-Gates. VLSI-SoC (Selected Papers) (2012)
Neil Di Spigna, Daniel Schinke, Srikant Jayanti, Veena Misra, Paul D. Franzon
A novel double floating-gate unified memory device. VLSI-SoC (2012)
Yi Lou, Zhuo Yan, Fan Zhang, Paul D. Franzon
Comparing Through-Silicon-Via (TSV) Void/Pinhole Defect Self-Test Methods. J. Electron. Test. 28 (1) (2012)
Shivam Priyadarshi, Christopher S. Saunders, Nikhil Kriplani, Harun Demircioglu, W. Rhett Davis, Paul D. Franzon, Michael B. Steer
Parallel Transient Simulation of Multiphysics Circuits Using Delay-Based Partitioning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31 (10) (2012)
Daniel Schinke, Neil Di Spigna, M. Shiveshwarkar, Paul D. Franzon
Computing with Novel Floating-Gate Devices. Computer 44 (2) (2011)
Ting Zhu, Mustafa Berke Yelten, Michael B. Steer, Paul D. Franzon
Application of Surrogate Modeling in Variation-aware Macromodel and Circuit Design. SIMULTECH (2011)
Thorlindur Thorolfsson, Nariman Moezzi Madani, Paul D. Franzon
Reconfigurable five-layer three-dimensional integrated memory-on-logic synthetic aperture radar processor. IET Comput. Digit. Tech. 5 (3) (2011)
Daniel Schinke, Wallace Shep Pitts, Neil Di Spigna, Paul D. Franzon
Low power interconnect design for fpgas with bidirectional wiring using nanocrystal floating gate devices (abstract only). FPGA (2011)
Ting Zhu, Mustafa Berke Yelten, Michael B. Steer, Paul D. Franzon
Variation-Aware Circuit Macromodeling and Design Based on Surrogate Models. SIMULTECH (Selected Papers) (2011)
Paul D. Franzon, W. Rhett Davis, Thorlindur Thorolfsson, Samson Melamed
3D Specific Systems: Design and CAD. Asian Test Symposium (2011)
Daniel Schinke, Shivam Priyadarshi, W. Shepherd Pitts, Neil Di Spigna, Paul D. Franzon
SPICE-compatible physical model of nanocrystal floating gate devices for circuit simulation. IET Circuits Devices Syst. 5 (6) (2011)
Paul D. Franzon, W. Rhett Davis, Zheng Zhou, Shivam Priyadarshi, Matthew Hogan, Tanay Karnik, Ganapti Srinavas
Coordinating 3D designs: Interface IP, standards or free form? 3DIC (2011)
Shivam Priyadarshi, Jianchen Hu, Won Ha Choi, Samson Melamed, Xi Chen, W. Rhett Davis, Paul D. Franzon
Pathfinder 3D: A flow for system-level design space exploration. 3DIC (2011)
Ran Wang, Gary Charles, Paul D. Franzon
Modeling and compare of through-silicon-via (TSV) in high frequency. 3DIC (2011)
Paul D. Franzon, W. Rhett Davis, Thorlindur Thorolfsson, Samson Melamed
3D specific systems design and CAD. ICSAMOS (2011)
Thorlindur Thorolfsson, Guojie Luo, Jason Cong, Paul D. Franzon
Logic-on-logic 3D integration and placement. 3DIC (2010)
Steve Lipa, Thorlindur Thorolfsson, Paul D. Franzon
The NCSU Tezzaron design kit. 3DIC (2010)
Thorlindur Thorolfsson, Samson Melamed, W. Rhett Davis, Paul D. Franzon
Low-Power Hypercube Divided Memory FFT Engine Using 3D Integration. ACM Trans. Design Autom. Electr. Syst. 16 (1) (2010)
Paul D. Franzon, W. Rhett Davis, Thorlindur Thorolfsson
Creating 3D specific systems: Architecture, design and CAD. DATE (2010)
Paul D. Franzon, John M. Wilson, Ming Li
Thermal isolation in 3D chip stacks using vacuum gaps and capacitive or inductive communications. 3DIC (2010)
William Rhett Davis, Eun Chu Oh, Ambarish M. Sule, Paul D. Franzon
Application Exploration for 3-D Integrated Circuits: TCAM, FIFO, and FFT Case Studies. IEEE Trans. Very Large Scale Integr. Syst. 17 (4) (2009)
Menglin Tsai, Amy Klooz, Alexander Leonard, Jennie Appel, Paul D. Franzon
Through Silicon Via(TSV) defect/pinhole self test circuit for 3D-IC. 3DIC (2009)
Thorlindur Thorolfsson, Kiran Gonsalves, Paul D. Franzon
Design automation for a 3DIC FFT processor for synthetic aperture radar: a case study. DAC (2009)
Liang Zhang, John M. Wilson, Rizwan Bashirullah, Lei Luo, Jian Xu, Paul D. Franzon
A 32-Gb/s On-Chip Bus With Driver Pre-Emphasis Signaling. IEEE Trans. Very Large Scale Integr. Syst. 17 (9) (2009)
Thorlindur Thorolfsson, Nariman Moezzi Madani, Paul D. Franzon
A low power 3D integrated FFT engine using hypercube memory division. ISLPED (2009)
Eun Chu Oh, Paul D. Franzon
Technology impact analysis for 3D TCAM. 3DIC (2009)
Thorlindur Thorolfsson, Samson Melamed, Gary Charles, Paul D. Franzon
Comparative analysis of two 3D integration implementations of a SAR processor. 3DIC (2009)
Samson Melamed, Thorlindur Thorolfsson, Adi Srinivasan, Edmund Cheng, Paul D. Franzon, William Rhett Davis
Junction-level thermal extraction and simulation of 3DICs. 3DIC (2009)
Ting Zhu, Paul D. Franzon
An enhanced macromodeling approach for differential output drivers. BMAS (2009)
Yuan Xie, Jason Cong, Paul D. Franzon
Editorial: Special issue on 3D integrated circuits and microarchitectures. ACM J. Emerg. Technol. Comput. Syst. 4 (4) (2008)
Ruchir Puri, Devadas Varma, Darvin Edwards, Alan J. Weger, Paul D. Franzon, Andrew Yang, Stephen V. Kosonocky
Keeping hot chips cool: are IC thermal problems hot air? DAC (2008)
Paul D. Franzon, W. Rhett Davis, Michael B. Steer, Steve Lipa, Eun Chu Oh, Thorlindur Thorolfsson, Samson Melamed, Sonali Luniya, Tad Doxsee, Stephen Berkeley, Ben Shani, Kurt Obermiller
Design and CAD for 3D integrated circuits. DAC (2008)

Paul D. Franzon.css-eqlu8i{font-size:small;padding-left:4px;}

Publication Activity (10 Years)

Top Topics

Top Venues

Paul D. Franzon