W. Rhett Davis

Publication Activity (10 Years)

Years Active: 2001-2024
Publications (10 Years): 16

Top Topics

Physical Design

Highly Heterogeneous

Hopfield Network

Feature Extractor

Top Venues

Publications

Zhishang Luo, Truong Son Hy, Puoya Tabaghi, Donghyeon Koh, Michaël Defferrard, Elahe Rezaei, Ryan Carey, W. Rhett Davis, Rajeev Jain, Yusu Wang
DE-HNN: An effective neural model for Circuit Netlist representation. CoRR (2024)
Zhishang Luo, Truong Son Hy, Puoya Tabaghi, Michaël Defferrard, Elahe Rezaei, Ryan Carey, W. Rhett Davis, Rajeev Jain, Yusu Wang
DE-HNN: An effective neural model for Circuit Netlist representation. AISTATS (2024)
Luis Francisco, W. Rhett Davis, Paul D. Franzon
A Deep Transfer Learning Design Rule Checker With Synthetic Training. IEEE Des. Test 40 (1) (2023)
Zhiping Wang, W. Rhett Davis
An Instruction-Level Power and Energy Model for the Rocket Chip Generator. ISLPED (2021)
W. Rhett Davis, Paul D. Franzon, Luis Francisco, Billy Huggins, Rajeev Jain
Fast and Accurate PPA Modeling with Transfer Learning. ICCAD (2021)
Luis Francisco, Paul D. Franzon, W. Rhett Davis
Fast and Accurate PPA Modeling with Transfer Learning. MLCAD (2021)
Qianli Zhao, W. Rhett Davis
A Virtual Platform for Object Detection Systems. 3DIC (2021)
Kirti Bhanushali, Chinmay Tembe, W. Rhett Davis
Development of a Predictive Process Design kit for15-nm FinFETs: FreePDK15. CoRR (2020)
Luis Francisco, Tanmay Lagare, Arpit Jain, Somal Chaudhary, Madhura Kulkarni, Divya Sardana, W. Rhett Davis, Paul D. Franzon
Design Rule Checking with a CNN Based Feature Extractor. MLCAD (2020)
Luis Francisco, Tanmay Lagare, Arpit Jain, Somal Chaudhary, Madhura Kulkarni, Divya Sardana, W. Rhett Davis, Paul D. Franzon
Design Rule Checking with a CNN Based Feature Extractor. CoRR (2020)
W. Rhett Davis, Colin Shaw, Ahmed Ramadan Hassan
How to write a compact reliability model with the Open Model Interface (OMI). IRPS (2020)
Barkha Gupta, W. Rhett Davis
Characterization of Fast, Accurate Leakage Power Models for IEEE P2416. ISQED (2019)
T. Robert Harris, W. Rhett Davis, Steven Lipa, W. Shepherd Pitts, Paul D. Franzon
Vertical Stack Thermal Characterization of Heterogeneous Integration and Packages. 3DIC (2019)
Billy Huggins, W. Rhett Davis, Paul D. Franzon
Estimating Pareto Optimum Fronts to Determine Knob Settings in Electronic Design Automation Tools. ISQED (2019)
Vinesh Srinivasan, Rangeen Basu Roy Chowdhury, Elliott Forbes, Randy Widialaksono, Zhenqian Zhang, Joshua Schabel, Sungkwan Ku, Steve Lipa, Eric Rotenberg, W. Rhett Davis, Paul D. Franzon
H3 (Heterogeneity in 3D): A Logic-on-Logic 3D-Stacked Heterogeneous Multi-Core Processor. ICCD (2017)
Randy Widialaksono, Rangeen Basu Roy Chowdhury, Zhenqian Zhang, Joshua Schabel, Steve Lipa, Eric Rotenberg, W. Rhett Davis, Paul D. Franzon
Physical design of a 3D-stacked heterogeneous multi-core processor. 3DIC (2016)
Paul D. Franzon, Eric Rotenberg, James Tuck, W. Rhett Davis, Huiyang Zhou, Joshua Schabel, Zhenqian Zhang, J. Brandon Dwiel, Elliott Forbes, Joonmoo Huh, Steve Lipa
Computing in 3D. CICC (2015)
Paul D. Franzon, Eric Rotenberg, James Tuck, W. Rhett Davis, Huiyang Zhou, Joshua Schabel, Zhenqian Zhang, J. Brandon Dwiel, Elliott Forbes, Joonmoo Huh, Marcus Tshibangu, Steve Lipa
Computing in 3D. 3DIC (2015)
Elliott Forbes, Zhenqian Zhang, Randy Widialaksono, Brandon H. Dwiel, Rangeen Basu Roy Chowdhury, Vinesh Srinivasan, Steve Lipa, Eric Rotenberg, W. Rhett Davis, Paul D. Franzon
Under 100-cycle thread migration latency in a single-ISA heterogeneous multi-core processor. Hot Chips Symposium (2015)
T. Robert Harris, Eric J. Wyers, Lee Wang, Samuel Graham, Georges Pavlidis, Paul D. Franzon, W. Rhett Davis
Thermal simulation of heterogeneous GaN/ InP/silicon 3DIC stacks. 3DIC (2015)
Kirti Bhanushali, W. Rhett Davis
FreePDK15: An Open-Source Predictive Process Design Kit for 15nm FinFET Technology. ISPD (2015)
Paul D. Franzon, Eric Rotenberg, James Tuck, Huiyang Zhou, W. Rhett Davis, Hongwen Dai, Joonmoo Huh, Sungkwan Ku, Steve Lipa, Chao Li, Jong Beom Park, Joshua Schabel
3D-enabled customizable embedded computer (3DECC). 3DIC (2014)
Randy Widialaksono, Wenxu Zhao, W. Rhett Davis, Paul D. Franzon
Leveraging 3D-IC for on-chip timing uncertainty measurements. 3DIC (2014)
T. Robert Harris, Paul D. Franzon, W. Rhett Davis, Lee Wang
Thermal effects of heterogeneous interconnects on InP / GaN / Si diverse integrated circuits. 3DIC (2014)
Shivam Priyadarshi, W. Rhett Davis, Paul D. Franzon
Pathfinder3D: A framework for exploring early thermal tradeoffs in 3DIC. ICICDT (2014)
Paul D. Franzon, Shivam Priyadarshi, Steve Lipa, W. Rhett Davis, Thorlindur Thorolfsson
Exploring early design tradeoffs in 3DIC. ISCAS (2013)
Eric Rotenberg, Brandon H. Dwiel, Elliott Forbes, Zhenqian Zhang, Randy Widialaksono, Rangeen Basu Roy Chowdhury, Nyunyi M. Tshibangu, Steve Lipa, W. Rhett Davis, Paul D. Franzon
Rationale for a 3D heterogeneous multi-core processor. ICCD (2013)
Shivam Priyadarshi, T. Robert Harris, Samson Melamed, Carlos Tadeo Ortega Otero, Nikhil Kriplani, Carlos E. Christoffersen, Rajit Manohar, Steven R. Dooley, W. Rhett Davis, Paul D. Franzon, Michael B. Steer
Dynamic electrothermal simulation of three-dimensional integrated circuits using standard cell macromodels. IET Circuits Devices Syst. 6 (1) (2012)
Samson Melamed, Thorlindur Thorolfsson, T. Robert Harris, Shivam Priyadarshi, Paul D. Franzon, Michael B. Steer, W. Rhett Davis
Junction-Level Thermal Analysis of 3-D Integrated Circuits Using High Definition Power Blurring. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31 (5) (2012)
Nagu R. Dhanwada, David J. Hathaway, Jerry Frenkil, W. Rhett Davis, Harun Demircioglu
Leakage Power Contributor Modeling. IEEE Des. Test Comput. 29 (2) (2012)
Shivam Priyadarshi, Christopher S. Saunders, Nikhil Kriplani, Harun Demircioglu, W. Rhett Davis, Paul D. Franzon, Michael B. Steer
Parallel Transient Simulation of Multiphysics Circuits Using Delay-Based Partitioning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31 (10) (2012)
Paul D. Franzon, W. Rhett Davis, Thorlindur Thorolfsson, Samson Melamed
3D Specific Systems: Design and CAD. Asian Test Symposium (2011)
Paul D. Franzon, W. Rhett Davis, Zheng Zhou, Shivam Priyadarshi, Matthew Hogan, Tanay Karnik, Ganapti Srinavas
Coordinating 3D designs: Interface IP, standards or free form? 3DIC (2011)
Shivam Priyadarshi, Jianchen Hu, Won Ha Choi, Samson Melamed, Xi Chen, W. Rhett Davis, Paul D. Franzon
Pathfinder 3D: A flow for system-level design space exploration. 3DIC (2011)
Nariman Moezzi Madani, Thorlindur Thorolfsson, Joseph Crop, Patrick Chiang, W. Rhett Davis
An energy-efficient 64-QAM MIMO detector for emerging wireless standards. DATE (2011)
Paul D. Franzon, W. Rhett Davis, Thorlindur Thorolfsson, Samson Melamed
3D specific systems design and CAD. ICSAMOS (2011)
Thorlindur Thorolfsson, Samson Melamed, W. Rhett Davis, Paul D. Franzon
Low-Power Hypercube Divided Memory FFT Engine Using 3D Integration. ACM Trans. Design Autom. Electr. Syst. 16 (1) (2010)
Paul D. Franzon, W. Rhett Davis, Thorlindur Thorolfsson
Creating 3D specific systems: Architecture, design and CAD. DATE (2010)
Ramsey Hourani, Ravi Jenkal, W. Rhett Davis, Winser E. Alexander
Automated Design Space Exploration for DSP Applications. J. Signal Process. Syst. 56 (2-3) (2009)
Paul D. Franzon, W. Rhett Davis, Michael B. Steer, Steve Lipa, Eun Chu Oh, Thorlindur Thorolfsson, Samson Melamed, Sonali Luniya, Tad Doxsee, Stephen Berkeley, Ben Shani, Kurt Obermiller
Design and CAD for 3D integrated circuits. DAC (2008)
Christopher Mineo, Ravi Jenkal, Samson Melamed, W. Rhett Davis
Inter-die signaling in three dimensional integrated circuits. CICC (2008)
James E. Stine, Ivan D. Castellanos, Michael H. Wood, Jeff Henson, Fred Love, W. Rhett Davis, Paul D. Franzon, Michael Bucher, Sunil Basavarajaiah, Julie Oh, Ravi Jenkal
FreePDK: An Open-Source Variation-Aware Design Kit. MSE (2007)
Ravi Jenkal, W. Rhett Davis
An architecture for energy efficient sphere decoding. ISLPED (2007)
Ravi Jenkal, Hao Hua, Ambarish M. Sule, W. Rhett Davis
Architecture for Energy Efficient Sphere Decoding. SoCC (2006)
Ramsey Hourani, Ravi Jenkal, W. Rhett Davis, Winser E. Alexander
Automated Architectural Exploration for Signal Processing Algorithms. SiPS (2006)
Hao Hua, Christopher Mineo, Kory Schoenfliess, Ambarish M. Sule, Samson Melamed, Ravi Jenkal, W. Rhett Davis
Exploring compromises among timing, power and temperature in three-dimensional integrated circuits. DAC (2006)
W. Rhett Davis, John M. Wilson, Stephen E. Mick, Jian Xu, Hao Hua, Christopher Mineo, Ambarish M. Sule, Michael B. Steer, Paul D. Franzon
Demystifying 3D ICs: The Pros and Cons of Going Vertical. IEEE Des. Test Comput. 22 (6) (2005)
W. Rhett Davis, Ambarish M. Sule, Hao Hua
Multi-Parameter Power Minimization of Synthesized Datapaths. ISVLSI (2004)
Engling Yeo, Stephanie Augsburger, W. Rhett Davis, Borivoje Nikolic
A 500-Mb/s soft-output Viterbi decoder. IEEE J. Solid State Circuits 38 (7) (2003)
W. Rhett Davis
Getting High-Performance Silicon from System-Level Design. ISVLSI (2003)
W. Rhett Davis, Ning Zhang, Kevin Camera, Dejan Markovic, Tina Smilkstein, M. Josie Ammer, Engling Yeo, Stephanie Augsburger, Borivoje Nikolic, Robert W. Brodersen
A design environment for high-throughput low-power dedicated signal processing systems. IEEE J. Solid State Circuits 37 (3) (2002)
W. Rhett Davis, Ning Zhang, Kevin Camera, Fred Chen, Dejan Markovic, Nathan Chan, Borivoje Nikolic, Robert W. Brodersen
A design environment for high throughput, low power dedicated signal processing systems. CICC (2001)