Winser E. Alexander

Publication Activity (10 Years)

Years Active: 1984-2015
Publications (10 Years): 1

Top Topics

Hardware Implementation

Low Pass Filter

Field Programmable Gate Array

Top Venues

Publications

Youngsoo Kim, William Harding, Clay S. Gloster Jr., Winser E. Alexander
Acceleration of Synthetic Aperture Radar (SAR) Algorithms using Field Programmable Gate Arrays (FPGAs) (Abstract Only). FPGA (2015)
Ramsey Hourani, Hazem Alassaly, Winser E. Alexander
Hardware implementation of IIR digital filters for programmable devices. ICECS (2013)
Youngsoo Kim, Winser E. Alexander, William W. Edmonson
A Dataflow Framework for DSP Algorithm Refinement. ISVLSI (2012)
Sandeep Hattangady, William W. Edmonson, Winser E. Alexander
Block Floating Point Interval ALU for Digital Signal Processing. Reliab. Comput. 15 (2) (2011)
Ramsey Hourani, Ravi Jenkal, W. Rhett Davis, Winser E. Alexander
Automated Design Space Exploration for DSP Applications. J. Signal Process. Syst. 56 (2-3) (2009)
Gary Charles, Christal Gordon, Winser E. Alexander
An Implementation of a Biological Neural Model using Analog-Digital Integrated Circuits. BMAS (2008)
William W. Edmonson, Senanu Ocloo, Cranos Williams, Winser E. Alexander
The Use of Interval Methods in Signal Processing and Control for Systems Biology. FOCI (2007)
Ruchir Gupte, William W. Edmonson, Senanu Ocloo, Winser E. Alexander
Pipelined ALU for Signal Processing to Implement Interval Arithmetic. SiPS (2006)
Chuanhua Xing, Donald L. Bitzer, Winser E. Alexander, Anne-Marie Stomp, Mladen A. Vouk
Free Energy Analysis on the Coding Region of the Individual Genes of Saccharomyces cerevisiae. EMBC (2006)
Ramsey Hourani, Ravi Jenkal, W. Rhett Davis, Winser E. Alexander
Automated Architectural Exploration for Signal Processing Algorithms. SiPS (2006)
Sung H. Yoon, Ji H. Lee, Jung H. Kim, Winser E. Alexander
Medical image compression using post-segmentation approach. ICASSP (5) (2004)
An-Te Deng, Winser E. Alexander
Dual clock rate block data parallel architecture. ISCAS (4) (2003)
Ji H. Lee, Sung H. Yoon, Winser E. Alexander
Region-based scalable coding for video communications. VCIP (2002)
Sung H. Yoon, Ji H. Lee, Winser E. Alexander
Scalable image coding for interactive image communication over networks. VCIP (2001)
Winser E. Alexander, Douglas S. Reeves, Clay S. Gloster Jr.
Parallel image processin gwith the block data paralel architecture. IBM J. Res. Dev. 44 (5) (2000)
Sung H. Yoon, Jung H. Kim, Winser E. Alexander, Seong M. Park, Kwang H. Sohn
An optimum solution for scale-invariant object recognition based on the multiresolution approximation. Pattern Recognit. 31 (7) (1998)
Kwanghoon Sohn, Jung H. Kim, Winser E. Alexander
A mean field annealing approach to robust corner detection. IEEE Trans. Syst. Man Cybern. Part B 28 (1) (1998)
Winser E. Alexander, Douglas S. Reeves, Clay S. Gloster Jr.
Parallel image processing with the block data parallel architecture. Proc. IEEE 84 (7) (1996)
Vincent C. Wilburn, Sonetra Howard, Winser E. Alexander
Matrix Inversion on a Scalable Distributed Memory Parallel Architectur. PDPTA (1996)
Sonetra Howard, Winser E. Alexander
Real-Time Implementation of the Kalman Filter Using the Block Data Parallel Architecture. PDPTA (1996)
Sean Alexandre, Winser E. Alexander, Douglas S. Reeves
A Programmable Simulator for Analyzing the Block Data Flow Architecture. MASCOTS (1994)
Kwanghoon Sohn, Winser E. Alexander, Jung H. Kim, Wesley E. Snyder
A Constrained Regularization Approach to Robust Corner Detection. IEEE Trans. Syst. Man Cybern. Syst. 24 (5) (1994)
Kenneth N. Ellis, Winser E. Alexander
Block Data Processing Using Commercial Processors. ICPP (1) (1994)
Hongyu Xu, Winser E. Alexander
Parallel inverse QR decomposition. ACM Southeast Regional Conference (1992)
Alvernon Walker, Winser E. Alexander, Parag K. Lala
Fault Diagnosis in Analog Circuits Using Element Modulation. IEEE Des. Test Comput. 9 (1) (1992)
Kwanghoon Sohn, Winser E. Alexander, Jung H. Kim, Yonghoon Kim, Wesley E. Snyder
Curvature estimation and unique corner point detection for boundary representation. ICRA (1992)
William W. Edmonson, Winser E. Alexander, Mohamed F. Chouikha
Adaptive state space filtering with FIR convergence behaviour. ICASSP (1992)
Hatice Örün Öztürk, Winser E. Alexander
Sampling error analysis in perfect reconstruction transmultiplexers. ICASSP (1991)
M. A. Khasawneh, Winser E. Alexander
Mean square error analysis for the fast LMS-sine algorithm. ICASSP (1990)
Mohamed-Yahia Dabbagh, Winser E. Alexander
Multiprocessor implementation of 2-D denominator-separable digital filters for real-time processing. IEEE Trans. Acoust. Speech Signal Process. 37 (6) (1989)
Daehoon Kim, Winser E. Alexander
Stability analysis of the fast RLS adaptation algorithm. ICASSP (1988)
Winser E. Alexander, William W. Edmonson
Boundary value transient suppression for N-D digital systems. ICASSP (1988)
Seong-Mo Park, Winser E. Alexander, Jung H. Kim, William E. Batchelor, William T. Krakow
A novel VLSI architecture for the real-time implementation of 2-D signal processing systems. ICCD (1988)
Jung H. Kim, Winser E. Alexander
A Multiprocessor Architecture for Two-Dimensional Digital Filters. IEEE Trans. Computers 36 (7) (1987)
Chwen-Jye Ju, Winser E. Alexander
Derivation and stability analysis of multidimensional IIR block digital filters. ICASSP (1987)
Winser E. Alexander
Initial condition transient suppression for two dimensional recursive digital filters. ICASSP (1984)
Dharma P. Agrawal, Winser E. Alexander
B-HIVE: a heterogeneous, interconnected, versatile and expandable multicomputer system. SIGARCH Comput. Archit. News 12 (2) (1984)