Sudhakar Pamarti

Publication Activity (10 Years)

Years Active: 2003-2024
Publications (10 Years): 49

Top Topics

Jump Diffusion Process

High Resolution

Top Venues

IEEE J. Solid State Circuits

Publications

Abdulaziz Alshaya, Sudhakar Pamarti, Christos Papavassiliou
FPGA Crystal Oscillator Circuit Emulation Based on Wave Digital Filter. IEEE Trans. Very Large Scale Integr. Syst. 32 (1) (2024)
Shi Bu, Vinod Kurian Jacob, Sudhakar Pamarti
Digital Residual Alias Cancellation for Filtering-by-Aliasing Receivers. IEEE Trans. Circuits Syst. I Regul. Pap. 71 (4) (2024)
Yang Cheng, Qingyuan Shu, Albert Lee, Haoran He, Ivy Zhu, Haris Suhail, Minzhang Chen, Renhe Chen, Zirui Wang, Hantao Zhang, Chih-Yao Wang, Shan-Yi Yang, Yu-Chen Hsin, Cheng-Yi Shih, Hsin-Han Lee, Ran Cheng, Sudhakar Pamarti, Xufeng Kou, Kang L. Wang
Voltage-Controlled Magnetoelectric Devices for Neuromorphic Diffusion Process. CoRR (2024)
Jarrah Bergeron, Sudhakar Pamarti
A Spur-free Dynamic Element Matching Scheme for Bandpass DACs. NEWCAS (2023)
Tianmu Li, Wojciech Romaszkan, Sudhakar Pamarti, Puneet Gupta
REX-SC: Range-Extended Stochastic Computing Accumulation for Neural Network Acceleration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (12) (2023)
Haris Suhail, Jiyue Yang, Haoran He, Kang L. Wang, Sudhakar Pamarti
Analytical Array-Level Comparison of Read/Write Performance Between Voltage Controlled-MRAM and STT-MRAM. MWSCAS (2023)
Shi Bu, Sudhakar Pamarti
A Dual-Channel High-Linearity Filtering-by-Aliasing Receiver Front-End Supporting Carrier Aggregation. IEEE J. Solid State Circuits 57 (5) (2022)
Jiazhang Song, Li-Yang Chen, Mau-Chung Frank Chang, Sudhakar Pamarti, Chih-Kong Ken Yang
A 14-bit 1-GS/s SiGe Bootstrap Sampler for High Resolution ADC with 250-MHz Input. ISCAS (2022)
Shi Bu, Vinod Kurian Jacob, Sudhakar Pamarti
A Digital Alias Cancellation Technique for Filtering-by-Aliasing Receivers. ISCAS (2022)
Jiyue Yang, Di Wu, Albert Lee, Seyed Armin Razavi, Puneet Gupta, Kang L. Wang, Sudhakar Pamarti
A Calibration-Free In-Memory True Random Number Generator Using Voltage-Controlled MRAM. ESSCIRC (2021)
Jiyue Yang, Di Wu, Albert Lee, Seyed Armin Razavi, Puneet Gupta, Kang L. Wang, Sudhakar Pamarti
A Calibration-Free In-Memory True Random Number Generator Using Voltage-Controlled MRAM. ESSDERC (2021)
Tianmu Li, Wojciech Romaszkan, Sudhakar Pamarti, Puneet Gupta
GEO: Generation and Execution Optimized Stochastic Computing Accelerator for Neural Networks. DATE (2021)
Yiwu Tang, Yuan-Hung Chung, Sudhakar Pamarti
Session 6 Overview: High-Performance Receivers and Transmitters for Sub-6GHz Radios Wireless Subcommittee. ISSCC (2021)
Saptadeep Pal, Jingyang Liu, Irina Alam, Nicholas Cebry, Haris Suhail, Shi Bu, Subramanian S. Iyer, Sudhakar Pamarti, Rakesh Kumar, Puneet Gupta
Designing a 2048-Chiplet, 14336-Core Waferscale Processor. DAC (2021)
Shi Bu, Sudhakar Pamarti
6.3 A 0.9V Dual-Channel Filtering-by-Aliasing Receiver Front-End Achieving +35dBm IIP3 and <-81dBm LO Leakage Supporting Intra-and Inter-Band Carrier Aggregation. ISSCC (2021)
Yan Zhang, Chia-Jen Liang, Christopher Chen, Andrew Liu, Jason Woo, Sudhakar Pamarti, Chih-Kong Ken Yang, Mau-Chung Frank Chang
A Sub-50fs-Jitter Sub-Sampling PLL with a Harmonic-Enhanced 30-GHz-Fundemental Class-C VCO in 0.18µm SiGe BiCMOS. ESSCIRC (2021)
Shi Bu, Sameed Hameed, Sudhakar Pamarti
Periodically Time-Varying Noise Cancellation for Filtering-by-Aliasing Receiver Front Ends. IEEE J. Solid State Circuits 56 (3) (2021)
Wojciech Romaszkan, Tianmu Li, Tristan Melton, Sudhakar Pamarti, Puneet Gupta
ACOUSTIC: Accelerating Convolutional Neural Networks through Or-Unipolar Skipped Stochastic Computing. DATE (2020)
David T. Blaauw, Hoi Lee, John P. Keane, Jaehyouk Choi, Sudhakar Pamarti
Introduction to the Special Issue on the 2020 IEEE International Solid-State Circuits Conference (ISSCC). IEEE J. Solid State Circuits 55 (12) (2020)
Mahmoud R. Elhebeary, Li-Yang Chen, Sudhakar Pamarti, Chih-Kong Ken Yang
An 8.5pJ/bit Ultra-Low Power Wake-Up Receiver Using Schottky Diodes for IoT Applications. ESSCIRC (2019)
Hani Esmaeelzadeh, Sudhakar Pamarti
A 0.55nW/0.5V 32kHz Crystal Oscillator Based on a DC-Only Sustaining Amplifier for IoT. ISSCC (2019)
Shi Bu, Sameed Hameed, Sudhakar Pamarti
An LPTV Noise Cancellation Technique for a 0.9-V Filtering-by-Aliasing Receiver Front-End with >67-dB Stopband Rejection. CICC (2019)
Hani Esmaeelzadeh, Sudhakar Pamarti
A Sub-nW 32-kHz Crystal Oscillator Architecture Based on a DC-Only Sustaining Amplifier. IEEE J. Solid State Circuits 54 (12) (2019)
Szu-Yao Hung, Sudhakar Pamarti
A 0.5-to-2.5GHz Multi-Output Fractional Frequency Synthesizer with 90fs Jitter and -106dBc Spurious Tones Based on Digital Spur Cancellation. ISSCC (2019)
Sameed Hameed, Sudhakar Pamarti
Design and Analysis of a Programmable Receiver Front End With Time-Interleaved Baseband Analog-FIR Filtering. IEEE J. Solid State Circuits 53 (11) (2018)
Sameed Hameed, Sudhakar Pamarti
Design and Analysis of a Programmable Receiver Front End Based on Baseband Analog-FIR Filtering Using an LPTV Resistor. IEEE J. Solid State Circuits 53 (6) (2018)
Sameed Hameed, Sudhakar Pamarti
Errata for "Design and Analysis of a Programmable Receiver Front End Based on Baseband Analog-FIR Filtering Using an LPTV Resistor". IEEE J. Solid State Circuits 53 (9) (2018)
Neha Sinha, Sudhakar Pamarti
Theoretical Analysis of Circuit Non-Idealities in a Passive Spectrum Scanner Based on Periodically Time-Varying Circuit Components. IEEE Trans. Circuits Syst. I Regul. Pap. (8) (2018)
Hani Esmaeelzadeh, Sudhakar Pamarti
A Quick Startup Technique for High-Q Oscillators Using Precisely Timed Energy Injection. IEEE J. Solid State Circuits 53 (3) (2018)
Jeffrey Lee, Ray Gomez, Sudhakar Pamarti
A Broadband Class-AB Power Amplifier With Instantaneous Supply-Switching Efficiency Enhancement for Cable TV Application. IEEE J. Solid State Circuits 53 (3) (2018)
Sameed Hameed, Sudhakar Pamarti
Impedance Matching and Reradiation in LPTV Receiver Front-Ends: An Analysis Using Conversion Matrices. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2018)
Sameed Hameed, Sudhakar Pamarti
24.6 A time-interleaved filtering-by-aliasing receiver front-end with >70dB suppression at <4× bandwidth frequency offset. ISSCC (2017)
Sudhakar Pamarti, Nan Sun
Session 3 - Clocking techniques. CICC (2017)
Neha Sinha, Mansour Rachid, Shanthi Pavan, Sudhakar Pamarti
Design and Analysis of an 8 mW, 1 GHz Span, Passive Spectrum Scanner With >+31 dBm Out-of-Band IIP3 Using Periodically Time-Varying Circuit Components. IEEE J. Solid State Circuits 52 (8) (2017)
Yousr Ismail, Haechang Lee, Sudhakar Pamarti, Chih-Kong Ken Yang
A 36-V 49% Efficient Hybrid Charge Pump in Nanometer-Scale Bulk CMOS Technology. IEEE J. Solid State Circuits 52 (3) (2017)
Meisam Heidarpour Roshan, Samira Zaliasl, Kimo Joo, Kamran Souri, Rajkumar Palwai, Lijun Will Chen, Amanpreet Singh, Sudhakar Pamarti, Nicholas Miller, Joseph C. Doll, Carl Arft, Sassan Tabatabaei, Carl Sechen, Aaron Partridge, Vinod Menon
A MEMS-Assisted Temperature Sensor With 20-µK Resolution, Conversion Rate of 200 S/s, and FOM of 0.04 pJK2. IEEE J. Solid State Circuits 52 (1) (2017)
Hani Esmaeelzadeh, Sudhakar Pamarti
A precisely-timed energy injection technique achieving 58/10/2μs start-up in 1.84/10/50MHz crystal oscillators. CICC (2017)
Med Nariman, Farid Shirinfar, Sudhakar Pamarti, Ahmadreza Rofougaran, Franco De Flaviis
High-Efficiency Millimeter-Wave Energy-Harvesting Systems With Milliwatt-Level Output Power. IEEE Trans. Circuits Syst. II Express Briefs (6) (2017)
Jeffrey Lee, Sudhakar Pamarti, Ramon A. Gomez
A 10-to-650MHz 1.35W class-AB power amplifier with instantaneous supply-switching efficiency enhancement. CICC (2017)
Meisam Heidarpour Roshan, Samira Zali Asl, Kimo Joo, Kamran Souri, Rajkumar Palwai, Lijun Will Chen, Sudhakar Pamarti, Joseph C. Doll, Nicholas Miller, Carl Arft, Sassan Tabatabaei, Carl Sechen, Aaron Partridge, Vinod Menon
11.1 Dual-MEMS-resonator temperature-to-digital converter with 40 K resolution and FOM of 0.12pJK2. ISSCC (2016)
Wei Wu, Yen-Lung Chen, Yue Ma, Chien-Nan Jimmy Liu, Jing-Yang Jou, Sudhakar Pamarti, Lei He
Wave digital filter based analog circuit emulation on FPGA. ISCAS (2016)
Sameed Hameed, Mansour Rachid, Babak Daneshrad, Sudhakar Pamarti
Frequency-Domain Analysis of N-Path Filters Using Conversion Matrices. IEEE Trans. Circuits Syst. II Express Briefs (1) (2016)
Sudhakar Pamarti, N. Sinha, Sameed Hameed, Mansour Rachid
Time-varying circuit approaches for software defined and cognitive radio applications. ISOCC (2016)
Sameed Hameed, Neha Sinha, Mansour Rachid, Sudhakar Pamarti
26.6 A programmable receiver front-end achieving >17dBm IIP3 at <1.25×BW frequency offset. ISSCC (2016)
Abhishek Ghosh, Sudhakar Pamarti
Linearization Through Dithering: A 50 MHz Bandwidth, 10-b ENOB, 8.2 mW VCO-Based ADC. IEEE J. Solid State Circuits 50 (9) (2015)
Neha Sinha, Mansour Rachid, Sudhakar Pamarti
A sharp programmable passive filter based on filtering by Aliasing. VLSIC (2015)
Sameed Hameed, Mansour Rachid, Babak Daneshrad, Sudhakar Pamarti
Frequency-domain analysis of a mixer-first receiver using conversion matrices. ISCAS (2015)
Samira Zali Asl, James C. Salvia, Ginel C. Hill, Lijun Will Chen, Kimo Joo, Rajkumar Palwai, Niveditha Arumugam, Meghan Phadke, Shouvik Mukherjee, Haechang Lee, Charles Grosjean, Paul M. Hagelin, Sudhakar Pamarti, Terri S. Fiez, Kofi A. A. Makinwa, Aaron Partridge, Vinod Menon
A 3 ppm 1.5 × 0.8 mm 2 1.0 µA 32.768 kHz MEMS-Based Oscillator. IEEE J. Solid State Circuits 50 (1) (2015)
Wei Wu, Peng Gu, Yen-Lung Chen, Chien-Nan Liu, Sudhakar Pamarti, Chang Wu, Lei He
Toward Wave Digital Filter based Analog Circuit Emulation on FPGA (Abstract Only). FPGA (2015)
Samira Zali Asl, Shouvik Mukherjee, Lijun Will Chen, Kimo Joo, Rajkumar Palwai, Niveditha Arumugam, P. Galle, Meghan Phadke, Charles Grosjean, Jim Salvia, Haechang Lee, Sudhakar Pamarti, Terri S. Fiez, Kofi A. A. Makinwa, Aaron Partridge, Vinod Menon
3ppm 1.0μA 32.768kHz MEMS-based oscillator. ISSCC (2014)
Yousr Ismail, Haechang Lee, Sudhakar Pamarti, Chih-Kong Ken Yang
23.8 A 34V charge pump in 65nm bulk CMOS technology. ISSCC (2014)
Hojat Parta, Milos D. Ercegovac, Sudhakar Pamarti
RF digital predistorter implementation using polynomial optimization. MWSCAS (2014)
Mansour Rachid, Sudhakar Pamarti, Babak Daneshrad
Filtering by Aliasing. IEEE Trans. Signal Process. 61 (9) (2013)
Abhishek Ghosh, Sudhakar Pamarti
A 50MHz bandwidth, 10-b ENOB, 8.2mW VCO-based ADC enabled by filtered-dithering based linearization. CICC (2013)
Minyoung Song, Inhwa Jung, Sudhakar Pamarti, Chulwoo Kim
A 2.4 GHz 0.1-Fref-Bandwidth All-Digital Phase-Locked Loop With Delay-Cell-Less TDC. IEEE Trans. Circuits Syst. I Regul. Pap. (12) (2013)
Abhishek Ghosh, Sudhakar Pamarti
Mitigating timing errors in time-interleaved ADCs: A signal conditioning approach. ISCAS (2013)
Abhishek Ghosh, Sudhakar Pamarti
Adaptive signal conditioning algorithms to enable wideband signal digitization. ICC (2013)
Abhishek Ghosh, Sudhakar Pamarti
Enabling high-speed, high-resolution ADCs using signal conditioning algorithms. MWSCAS (2013)
Michael H. Perrott, James C. Salvia, Fred S. Lee, Aaron Partridge, Shouvik Mukherjee, Carl Arft, Jin-Tae Kim, Niveditha Arumugam, Pavan Gupta, Sassan Tabatabaei, Sudhakar Pamarti, Haechang Lee, Fari Assaderaghi
A Temperature-to-Digital Converter for a MEMS-Based Programmable Oscillator With < ±0.5-ppm Frequency Stability and < 1-ps Integrated Jitter. IEEE J. Solid State Circuits 48 (1) (2013)
Abhishek Ghosh, Sudhakar Pamarti
Filtering of subtractive discrete dither in quantizers: Some new results. ICASSP (2013)
Abhishek Ghosh, Sudhakar Pamarti
Dithered quantizers with negligible in-band dither power CoRR (2012)
Wei Yao, Yiyu Shi, Lei He, Sudhakar Pamarti
Worst-Case Estimation for Data-Dependent Timing Jitter and Amplitude Noise in High-Speed Differential Link. IEEE Trans. Very Large Scale Integr. Syst. 20 (1) (2012)
Woogeun Rhee, Antonio Liscidini, Jae-Yoon Sim, Kenichi Okada, Sudhakar Pamarti
Clock/Frequency Generation Circuits and Systems. J. Electr. Comput. Eng. 2012 (2012)
Abhishek Ghosh, Sudhakar Pamarti
Mitigating Timing Errors in Time-Interleaved ADCs: a signal conditioning approach CoRR (2012)
Chiranjib Choudhuri, Abhishek Ghosh, Urbashi Mitra, Sudhakar Pamarti
Robustness of xampling-based RF receivers against analog mismatches. ICASSP (2012)
Michael H. Perrott, Jim Salvia, Fred S. Lee, Aaron Partridge, Shouvik Mukherjee, Carl Arft, Jin-Tae Kim, Niveditha Arumugam, Pavan Gupta, Sassan Tabatabaei, Sudhakar Pamarti, Haechang Lee, Fari Assaderaghi
A temperature-to-digital converter for a MEMS-based programmable oscillator with better than ±0.5ppm frequency stability. ISSCC (2012)
Brian Fitzgibbon, Sudhakar Pamarti, Michael Peter Kennedy
A Spur-Free MASH DDSM With High-Order Filtered Dither. IEEE Trans. Circuits Syst. II Express Briefs (9) (2011)
Nitin Nidhi, Pin-En Su, Sudhakar Pamarti
Open-Loop Wide-Bandwidth Phase Modulation Techniques. J. Electr. Comput. Eng. 2011 (2011)
Mansour Rachid, Sudhakar Pamarti, Babak Daneshrad
A novel reconfigurable alias interference cancellation technique for A-to-D conversion. ISCAS (2011)
Sandeep D'Souza, Mau-Chung Frank Chang, Sudhakar Pamarti, Bipul Agarwal, Hossein Zarei, Tirdad Sowlati, Roc Berenguer
A progammable baseband anti-alias filter for a passive-mixer-based, SAW-less, multi-band, multi-mode WEDGE transmitter. ISCAS (2011)
Pin-En Su, Sudhakar Pamarti
A 2.4 GHz Wideband Open-Loop GFSK Transmitter With Phase Quantization Noise Cancellation. IEEE J. Solid State Circuits 46 (3) (2011)
Tzu-Chien Hsueh, Sudhakar Pamarti
A 16 Gb/s four-wire CDMA-based high speed I/O link with transmitter timing adjustment. CICC (2010)
Nitesh Singhal, Sudhakar Pamarti
A Digital Envelope Combiner for Switching Power Amplifier Linearization. IEEE Trans. Circuits Syst. II Express Briefs (4) (2010)
Michael H. Perrott, Sudhakar Pamarti, Eric G. Hoffman, Fred S. Lee, Shouvik Mukherjee, Cathy Lee, Vadim Tsinker, Sathi Perumal, Benjamin Soto, Niveditha Arumugam, Bruno W. Garlepp
A Low Area, Switched-Resistor Based Fractional-N Synthesizer Applied to a MEMS-Based Programmable Oscillator. IEEE J. Solid State Circuits 45 (12) (2010)
Nitesh Singhal, Nitin Nidhi, Sudhakar Pamarti
A power amplifier with minimal efficiency degradation under back-off. ISCAS (2010)
Michael H. Perrott, Sudhakar Pamarti, Eric G. Hoffman, Fred S. Lee, Shouvik Mukherjee, Cathy Lee, Vadim Tsinker, Sathi Perumal, Benjamin Soto, Niveditha Arumugam, Bruno W. Garlepp
A low-area switched-resistor loop-filter technique for fractional-N synthesizers applied to a MEMS-based programmable oscillator. ISSCC (2010)
Tzu-Chien Hsueh, Pin-En Su, Sudhakar Pamarti
A 3 , ˟, 3.8 Gb/s Four-Wire High Speed I/O Link Based on CDMA-Like Crosstalk Cancellation. IEEE J. Solid State Circuits 45 (8) (2010)
Pin-En Su, Sudhakar Pamarti
Mismatch Shaping Techniques to Linearize Charge Pump Errors in Fractional-N PLLs. IEEE Trans. Circuits Syst. I Regul. Pap. (6) (2010)
Tzu-Chien Hsueh, Pin-En Su, Sudhakar Pamarti
A 3×3.8Gb/s four-wire high speed I/O link based on CDMA-like crosstalk cancellation. CICC (2009)
Pin-En Su, Sudhakar Pamarti
Fractional-N Phase-Locked-Loop-Based Frequency Synthesis: A Tutorial. IEEE Trans. Circuits Syst. II Express Briefs (12) (2009)
Wei Yao, Yiyu Shi, Lei He, Sudhakar Pamarti
Joint design-time and post-silicon optimization for digitally tuned analog circuits. ICCAD (2009)
Sudhakar Pamarti
Digital techniques for integrated frequency synthesizers: A tutorial. IEEE Commun. Mag. 47 (4) (2009)
Wei Yao, Yiyu Shi, Lei He, Sudhakar Pamarti, Yu Hu
Worst case timing jitter and amplitude noise in differential signaling. ISQED (2009)
Sudhakar Pamarti
A Theoretical Study of the Quantization Noise in Split Delta-Sigma ADCs. IEEE Trans. Circuits Syst. I Regul. Pap. (5) (2008)
Sudhakar Pamarti, Siamak Delshadpour
A Spur Elimination Technique for Phase Interpolation-Based Fractional-N PLLs. IEEE Trans. Circuits Syst. I Regul. Pap. (6) (2008)
Sudhakar Pamarti
The Effect of Noise Cross-Coupling on Time-Interleaved Delta-Sigma ADCs. IEEE Trans. Circuits Syst. II Express Briefs (6) (2008)
Sudhakar Pamarti
A Theoretical Analysis of Split Delta-Sigma ADCs. ISCAS (2007)
Sudhakar Pamarti, Ian Galton
LSB Dithering in MASH Delta-Sigma D/A Converters. IEEE Trans. Circuits Syst. I Regul. Pap. (4) (2007)
Sudhakar Pamarti, Jared Welz, Ian Galton
Statistics of the Quantization Noise in 1-Bit Dithered Single-Quantizer Digital Delta-Sigma Modulators. IEEE Trans. Circuits Syst. I Regul. Pap. (3) (2007)
Changbo Long, Sasank Reddy, Sudhakar Pamarti, Lei He, Tanay Karnik
Power-efficient pulse width modulation DC/DC converters with zero voltage switching control. ISLPED (2006)
Elad Alon, Jaeha Kim, Sudhakar Pamarti, Ken Chang, Mark Horowitz
Replica compensated linear regulators for supply-regulated phase-locked loops. IEEE J. Solid State Circuits 41 (2) (2006)
Sudhakar Pamarti, Lars C. Jansson, Ian Galton
Addition to "A Wideband 2.4-GHz Delta-Sigma Fractional-$N$PLL With 1-Mb/s In-Loop Modulation". IEEE J. Solid State Circuits 40 (2) (2005)
Sudhakar Pamarti, Lars C. Jansson, Ian Galton
A wideband 2.4-GHz delta-sigma fractional-NPLL with 1-Mb/s in-loop modulation. IEEE J. Solid State Circuits 39 (1) (2004)
Sudhakar Pamarti, Ian Galton
Phase-noise cancellation design tradeoffs in delta-sigma fractional-N PLLs. IEEE Trans. Circuits Syst. II Express Briefs 50 (11) (2003)