Chien-Nan Liu

Publication Activity (10 Years)

Years Active: 2008-2023
Publications (10 Years): 11

Top Topics

Allocation Strategy

Top Venues

Publications

Ling-Yen Song, Chih-Yun Chou, Tung-Chieh Kuo, Chien-Nan Liu, Juinn-Dar Huang
Machine Learning Assisted Circuit Sizing Approach for Low-Voltage Analog Circuits with Efficient Variation-Aware Optimization. ACM Trans. Design Autom. Electr. Syst. 28 (2) (2023)
Bo-Cheng Lai, Tzu-Chieh Chiang, Po-Shen Kuo, Wan-Ching Wang, Yan-Lin Hung, Hung-Ming Chen, Chien-Nan Liu, Shyh-Jye Jou
DASC: A DRAM Data Mapping Methodology for Sparse Convolutional Neural Networks. DATE (2022)
Kang-Yi Fan, Jyun-Hua Chen, Chien-Nan Liu, Juinn-Dar Huang
Performance Optimization for MLP Accelerators using ILP-Based On-Chip Weight Allocation Strategy. VLSI-DAT (2022)
Hao-Yu Chi, Simon Yi-Hung Chen, Hung-Ming Chen, Chien-Nan Liu, Yun-Chih Kuo, Ya-Hsin Chang, Kuan-Hsien Ho
Practical Substrate Design Considering Symmetrical and Shielding Routes. DATE (2022)
Hao-Yu Chi, Han-Chung Chang, Chih-Hsin Yang, Chien-Nan Liu, Jing-Yang Jou
Performance-driven Routing Methodology with Incremental Placement Refinement for Analog Layout Design. DATE (2021)
Hung-Ming Chen, Cheng-En Ni, Kang-Yu Chang, Tzu-Chieh Chiang, Shih-Han Chang, Cheng-Yu Chiang, Bo-Cheng Lai, Chien-Nan Liu, Shyh-Jye Jou
On Reconfiguring Memory-Centric AI Edge Devices for CIM. ISOCC (2021)
Ling-Yen Song, Chih-Shen Yeh, Chien-Nan Liu, Juinn-Dar Huang
Storage-Aware Scheduling Algorithm for Reservoir Switching Minimization on Digital Microfluidic Biochips. VLSI-DAT (2021)
Hung-Ming Chen, Chia-Lin Hu, Kang-Yu Chang, Alexandra Küster, Yu-Hsien Lin, Po-Shen Kuo, Wei-Tung Chao, Bo-Cheng Lai, Chien-Nan Liu, Shyh-Jye Jou
On EDA Solutions for Reconfigurable Memory-Centric AI Edge Applications. ICCAD (2020)
Abhishek Patyal, Po-Cheng Pan, K. A. Asha, Hung-Ming Chen, Hao-Yu Chi, Chien-Nan Liu
Analog placement with current flow and symmetry constraints using PCP-SP. DAC (2018)
Yo-Hao Tu, Kai-Wen Yao, Minghao Huang, Yu-Yun Lin, Hao-Yu Chi, Po-Min Cheng, Pei-Yun Tsai, Muh-Tian Shiue, Chien-Nan Liu, Kuo-Hsing Cheng, Jia-Shiang Fu
A body sensor node SoC for ECG/EMG applications with compressed sensing and wireless powering. VLSI-DAT (2017)
Wei Wu, Peng Gu, Yen-Lung Chen, Chien-Nan Liu, Sudhakar Pamarti, Chang Wu, Lei He
Toward Wave Digital Filter based Analog Circuit Emulation on FPGA (Abstract Only). FPGA (2015)
Hungwen Lu, Chauchin Su, Chien-Nan Liu
A scalable digitalized buffer for gigabit I/O. CICC (2008)