Po-Cheng Pan

Publication Activity (10 Years)

Years Active: 2009-2020
Publications (10 Years): 4

Top Topics

Photographic Images

Collision Detection

Ordering Constraints

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Abhishek Patyal, Po-Cheng Pan, K. A. Asha, Hung-Ming Chen, Wei-Zen Chen
Exploring Multiple Analog Placements With Partial-Monotonic Current Paths and Symmetry Constraints Using PCP-SP. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (12) (2020)
Po-Cheng Pan, Chien-Chia Huang, Hung-Ming Chen
An Efficient Learning-based Approach for Performance Exploration on Analog and RF Circuit Synthesis. DAC (2019)
Po-Cheng Pan, Hung-Wen Huang, Chien-Chia Huang, Abhishek Patyal, Hung-Ming Chen, Tsun-Yu Yang
On Closing the Gap Between Pre-Simulation and Post-Simulation Results in Nanometer Analog Layouts. SMACD (2018)
Abhishek Patyal, Po-Cheng Pan, K. A. Asha, Hung-Ming Chen, Hao-Yu Chi, Chien-Nan Liu
Analog placement with current flow and symmetry constraints using PCP-SP. DAC (2018)
Po-Cheng Pan, Ching-Yu Chin, Hung-Ming Chen, Tung-Chieh Chen, Chin-Chieh Lee, Jou-Chun Lin
A Fast Prototyping Framework for Analog Layout Migration With Planar Preservation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34 (9) (2015)
Hui-Tang Chang, Po-Cheng Pan, Yu-Chiang Frank Wang, Ming-Syan Chen
R2P: Recomposition and Retargeting of Photographic Images. ACM Multimedia (2015)
Shih-Hsin Hsu, Wei-Zen Chen, Jui-Pin Zheng, Sean S.-Y. Liu, Po-Cheng Pan, Hung-Ming Chen
An automatic synthesis tool for nanometer low dropout regulator using simulation based model and geometric programming. VLSI-DAT (2014)
Po-Cheng Pan, Hung-Ming Chen, Chien-Chih Lin
PAGE: parallel agile genetic exploration towards utmost performance for analog circuit design. DATE (2013)
Ching-Yu Chin, Po-Cheng Pan, Hung-Ming Chen, Tung-Chieh Chen, Jou-Chun Lin
Efficient analog layout prototyping by layout reuse with routing preservation. ICCAD (2013)
Po-Cheng Pan, Hung-Ming Chen, Yi-Kan Cheng, Jill Liu, Wei-Yi Hu
Configurable analog routing methodology via technology and design constraint unification. ICCAD (2012)
Yi-Peng Weng, Hung-Ming Chen, Tung-Chieh Chen, Po-Cheng Pan, Chien-Hung Chen, Wei-Zen Chen
Fast analog layout prototyping for nanometer design migration. ICCAD (2011)
Kuo-Hsuan Meng, Po-Cheng Pan, Hung-Ming Chen
Integrated hierarchical synthesis of analog/RF circuits with accurate performance mapping. ISQED (2011)
Bo-Zhou Chen, Hung-Ming Chen, Li-Da Huang, Po-Cheng Pan
A stochastic-based efficient critical area extractor on OpenAccess platform. ACM Great Lakes Symposium on VLSI (2009)