Chia-Lin Hu

Publication Activity (10 Years)

Years Active: 2007-2023
Publications (10 Years): 5

Top Topics

Reconfigurable Architecture

Unlabelled Data

Memory Requirements

Top Venues

Publications

Cheng-Yu Chiang, Chia-Lin Hu, Mark Po-Hung Lin, Yu-Szu Chung, Shyh-Jye Jou, Jieh-Tsorng Wu, Shiuh-Hua Wood Chiang, Chien-Nan Jimmy Liu, Hung-Ming Chen
On Automating Finger-Cap Array Synthesis with Optimal Parasitic Matching for Custom SAR ADC. ASP-DAC (2023)
Chi Liu, Shao-Tzu Li, Tong-Lin Pan, Cheng-En Ni, Yun Sung, Chia-Lin Hu, Kang-Yu Chang, Tuo-Hung Hou, Tian-Sheuan Chang, Shyh-Jye Jou
An 1-bit by 1-bit High Parallelism In-RRAM Macro with Co-Training Mechanism for DCNN Applications. VLSI-DAT (2022)
Cheng-Yu Chiang, Chia-Lin Hu, Kang-Yu Chang, Mark Po-Hung Lin, Shyh-Jye Jou, Hung-Yu Chen, Chien-Nan Jimmy Liu, Hung-Ming Chen
On Optimizing Capacitor Array Design for Advanced Node SAR ADC. SMACD (2022)
Yu-Hsien Lin, Chi Liu, Chia-Lin Hu, Kang-Yu Chang, Jia-Yin Chen, Shyh-Jye Jou
A Reconfigurable In-SRAM Computing Architecture for DCNN Applications. VLSI-DAT (2021)
Hung-Ming Chen, Chia-Lin Hu, Kang-Yu Chang, Alexandra Küster, Yu-Hsien Lin, Po-Shen Kuo, Wei-Tung Chao, Bo-Cheng Lai, Chien-Nan Liu, Shyh-Jye Jou
On EDA Solutions for Reconfigurable Memory-Centric AI Edge Applications. ICCAD (2020)
Li-Rong Wang, Yi-Wei Chiu, Chia-Lin Hu, Ming-Hsien Tu, Shyh-Jye Jou, Chung-Len Lee
A reconfigurable MAC architecture implemented with mixed-Vt standard cell library. ISCAS (2008)
Jiun-Yi Lin, Li-Rong Wang, Chia-Lin Hu, Shyh-Jye Jou
Mixed-VTH (MVT) CMOS circuit design for low power cell libraries. SoCC (2007)