Michael Peter Kennedy

ORCID

Publication Activity (10 Years)

Years Active: 1991-2024
Publications (10 Years): 55

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

ICECS

ISCAS

ISSCC

Publications

Xu Wang, Michael Peter Kennedy
Comparison of DTC Segmentation Methods in Fractional-N Frequency Synthesizers. ISCAS (2024)
Michael Peter Kennedy, Valerio Mazzaro, Stefano Tulisi, Micheál Scully, Niall McDermott, James Breslin
10.4 A 45.5fs-Integrated-Random-Jitter and -75dBc-Integer-Boundary-Spur BiCMOS Fractional-N PLL with Suppression of Fractional, Horn, and Wandering Spurs. ISSCC (2024)
Xu Lu, Michael Peter Kennedy
Further Insights into Spur Immunity in MASH-Based Fractional-N CP-PLLs with Polynomial Nonlinearities. ICECS (2023)
Xu Wang, Michael Peter Kennedy
Comparison of DTC-Related Spurs in Fractional-N Digital PLLs with MASH-and-ENOP-based Divider Controllers. ICECS (2023)
Xu Wang, Michael Peter Kennedy
Linearized Analysis of Mid-Rise TDCs for Integer-N and Fractional-N Digital PLLs. NEWCAS (2023)
Xu Wang, Michael Peter Kennedy
Enhanced Jitter Analysis and Minimization for Digital PLLs With Mid-Rise TDCs and its Impact on Output Phase Noise. IEEE Trans. Circuits Syst. I Regul. Pap. 70 (12) (2023)
Dawei Mai, Michael Peter Kennedy
Initial Condition-Dependent Spur Pattern Induced by Undithered MASH DDSM Divider Controller. ISCAS (2023)
Dawei Mai, Michael Peter Kennedy
Optimized MASH-SR Divider Controller for Fractional-N Frequency Synthesizers. IEEE Trans. Circuits Syst. I Regul. Pap. 70 (3) (2023)
Xu Wang, Michael Peter Kennedy
Performance Limits of Fractional-N Digital PLLs with Mid-Rise TDCs. PRIME (2023)
Xu Wang, Michael Peter Kennedy
MMSE Estimator for Linearized Analysis and SNR of ADCs Tested with Sinusoidal Inputs. PRIME (2023)
Xu Wang, Michael Peter Kennedy
Comparative Study of Linearized Analysis Frameworks for Mid-Rise TDCs. NEWCAS (2023)
Valerio Mazzaro, Michael Peter Kennedy
A Family of ΔΣ Modulators With High Spur Immunity and Low Folded Nonlinearity Noise When Used in Fractional- Frequency Synthesizers. IEEE Trans. Circuits Syst. I Regul. Pap. 69 (11) (2022)
Simone Mattia Dartizio, Francesco Tesolin, Mario Mercandelli, Alessio Santiccioli, Abanob Shehata, Saleh Karman, Luca Bertulessi, Francesco Buccoleri, Luca Avallone, Angelo Parisi, Andrea L. Lacaita, Michael Peter Kennedy, Carlo Samori, Salvatore Levantino
A 12.9-to-15.1-GHz Digital PLL Based on a Bang-Bang Phase Detector With Adaptively Optimized Noise Shaping. IEEE J. Solid State Circuits 57 (6) (2022)
Valerio Mazzaro, Michael Peter Kennedy
Immunity of ENOP-based Fractional-N Frequency Synthesizer to Wandering and Horn Spurs. PRIME (2022)
Xu Wang, Michael Peter Kennedy
A random pulse modulation approach to modeling the flicker and white noise of the charge pump of a fractional-N frequency synthesizer. Int. J. Circuit Theory Appl. 50 (4) (2022)
Dawei Mai, Yann Donnelly, Michael Peter Kennedy, Stefano Tulisi, James Breslin, Patrick Griffin, Michael Connor, Stephen Brookes, Brian Shelly, Mike Keaveney
Wandering Spur Suppression in a 4.9-GHz Fractional-N Frequency Synthesizer. IEEE J. Solid State Circuits 57 (7) (2022)
Michael Peter Kennedy, Valerio Mazzaro, Dawei Mai
Nonlinearity-Induced Spurs in Fractional-N Frequency Synthesizers. IEEE Trans. Circuits Syst. II Express Briefs 69 (6) (2022)
Dawei Mai, Yann Donnelly, Michael Peter Kennedy, Stefano Tulisi, James Breslin, Patrick Griffin, Michael Connor, Stephen Brookes, Brian Shelly, Michael Keaveney
Experimental Verification of Wandering Spur Suppression Technique in a 4.9 GHz Fractional-N Frequency Synthesizer. ESSCIRC (2021)
Mario Mercandelli, Alessio Santiccioli, Simone Mattia Dartizio, Abanob Shehata, Francesco Tesolin, Saleh Karman, Luca Bertulessi, Francesco Buccoleri, Luca Avallone, Angelo Parisi, Andrea Leonardo Lacaita, Michael Peter Kennedy, Carlo Samori, Salvatore Levantino
A 12.9-to-15.1GHz Digital PLL Based on a Bang-Bang Phase Detector with Adaptively Optimized Noise Shaping Achieving 107.6fs Integrated Jitter. ISSCC (2021)
Valerio Mazzaro, Michael Peter Kennedy
Folded Noise Prediction in Nonlinear Fractional-N Frequency Synthesizers. IEEE Trans. Circuits Syst. I Regul. Pap. 68 (10) (2021)
Yann Donnelly, Michael Peter Kennedy
An Algorithm for Implementing a Modulator Whose Output is Spur-Free After Nonlinear Distortion. IEEE Trans. Circuits Syst. I Regul. Pap. 68 (10) (2021)
Dawei Mai, Michael Peter Kennedy
MASH-Based Divider Controllers for Mitigation of Wandering Spurs in a Fractional-N Frequency Synthesizer. IEEE Trans. Circuits Syst. I Regul. Pap. 68 (1) (2021)
Valerio Mazzaro, Michael Peter Kennedy
Spur Immunity in MASH-Based Fractional-N CP-PLLs With Polynomial Nonlinearities. IEEE Trans. Circuits Syst. I Regul. Pap. 68 (6) (2021)
Luca Avallone, Mario Mercandelli, Alessio Santiccioli, Michael Peter Kennedy, Salvatore Levantino, Carlo Samori
A Comprehensive Phase Noise Analysis of Bang-Bang Digital PLLs. IEEE Trans. Circuits Syst. I Regul. Pap. 68 (7) (2021)
Alessio Santiccioli, Mario Mercandelli, Simone Mattia Dartizio, Francesco Tesolin, Saleh Karman, Abanob Shehata, Luca Bertulessi, Francesco Buccoleri, Luca Avallone, Angelo Parisi, Dmytro Cherniak, Andrea L. Lacaita, Michael Peter Kennedy, Carlo Samori, Salvatore Levantino
32.8 A 98.4fs-Jitter 12.9-to-15.1GHz PLL-Based LO Phase-Shifting System with Digital Background Phase-Offset Correction for Integrated Phased Arrays. ISSCC (2021)
Valerio Mazzaro, Michael Peter Kennedy
A Curious Result concerning Spur Generation in MASH 1-1-1 based Fractional-N CP-PLLs with a Second-Order Nonlinearity. ICECS (2020)
Andrii Sokolov, Dimitri Galayko, Michael Peter Kennedy, Elena Blokhina
Near-Limit Kinetic Energy Harvesting From Arbitrary Acceleration Waveforms: Feasibility Study by the Example of Human Motion. IEEE Access 8 (2020)
Dawei Mai, Michael Peter Kennedy
Influence of Initial Condition on Wandering Spur Pattern in a MASH-Based Fractional-N Frequency Synthesizer. IEEE Trans. Circuits Syst. (12) (2020)
Andrii Sokolov, Dhiman Mallick, Saibal Roy, Michael Peter Kennedy, Elena Blokhina
Modelling and Verification of Nonlinear Electromechanical Coupling in Micro-Scale Kinetic Electromagnetic Energy Harvesters. IEEE Trans. Circuits Syst. I Regul. Pap. (2) (2020)
Luca Avallone, Michael Peter Kennedy, Saleh Karman, Carlo Samori, Salvatore Levantino
Jitter Minimization in Digital PLLs with Mid-Rise TDCs. IEEE Trans. Circuits Syst. I Regul. Pap. (3) (2020)
Dawei Mai, Michael Peter Kennedy
Analysis of Wandering Spur Patterns in a Fractional-N Frequency Synthesizer With a MASH-Based Divider Controller. IEEE Trans. Circuits Syst. I Regul. Pap. (3) (2020)
Valerio Mazzaro, Michael Peter Kennedy
Mitigation of "Horn Spurs" in a MASH-Based Fractional-N CP-PLL. IEEE Trans. Circuits Syst. II Express Briefs (5) (2020)
Yann Donnelly, Michael Peter Kennedy
Wandering Spurs in MASH 1-1 Delta-Sigma Modulators. IEEE Trans. Circuits Syst. I Regul. Pap. (7) (2019)
Dawei Mai, Adil Dahlan, Michael Peter Kennedy
MASH DDSM-Induced Spurs in a Fractional-N Frequency Synthesizer. ICECS (2019)
Yann Donnelly, Michael Peter Kennedy
Prediction of Phase Noise and Spurs in a Nonlinear Fractional-N Frequency Synthesizer. IEEE Trans. Circuits Syst. I Regul. Pap. (11) (2019)
Valerio Mazzaro, Michael Peter Kennedy
Observations concerning "Horn Spurs" in a MASH-based Fractional-N CP-PLL. ICECS (2019)
Salvatore Galeone, Michael Peter Kennedy, Karim Ahmed, Hyman Shanan, Mike Keaveney
An Eight-Phase 40GHz RTWO in 28nm CMOS with Phase Noise Reduction Via Head and Tail Filtering. ICECS (2019)
Michael Peter Kennedy
Nonlinearity-Induced Spurs in Fractional-N Frequency Synthesizers: State of the Art. ICECS (2019)
Andrii Sokolov, Michael Peter Kennedy, Elena Blokhina
Method of Equivalent Currents for the Calculation of Magnetic Fields in Inductors and Magnets with Application to Electronics. ISCAS (2019)
Michael Peter Kennedy, Yann Donnelly, James Breslin, Stefano Tulisi, Sanganagouda Patil, Ciaran Curtin, Stephen Brookes, Brian Shelly, Patrick Griffin, Michael Keaveney
4.48GHz 0.18μm SiGe BiCMOS Exact-Frequency Fractional-N Frequency Synthesizer with Spurious-Tone Suppression Yielding a -80dBc In-Band Fractional Spur. ISSCC (2019)
Andrii Sokolov, Dhiman Mallick, Saibal Roy, Michael Peter Kennedy, Elena Blokhina
Novel Approach to Modelling Electromechanical Coupling and Testing its Self-Consistency in Micro-Scale Kinetic Electromagnetic Energy Harvesters. ICECS (2018)
Yann Donnelly, Hongjia Mo, Michael Peter Kennedy
High-Speed Nested Cascaded MASH Digital Delta-Sigma Modulator-Based Divider Controller. ISCAS (2018)
Dawei Mai, Michael Peter Kennedy
A Design Method for Nested MASH-SQ Hybrid Divider Controllers for Fractional-N Frequency Synthesizers. IEEE Trans. Circuits Syst. I Regul. Pap. (10) (2018)
Dawei Mai, Hongjia Mo, Michael Peter Kennedy
Observations and Analysis of Wandering Spurs in MASH-Based Fractional-N Frequency Synthesizers. IEEE Trans. Circuits Syst. II Express Briefs (5) (2018)
Michael Peter Kennedy, Hongjia Mo, Dawei Mai
Nonlinearity-induced spurious tones and noise in digitally-assisted frequency synthesizers. ISCAS (2017)
Hongjia Mo, Michael Peter Kennedy
Influence of Initial Conditions on the Fundamental Periods of LFSR-Dithered MASH Digital Delta-Sigma Modulators With Constant Inputs. IEEE Trans. Circuits Syst. II Express Briefs (4) (2017)
Hongjia Mo, Michael Peter Kennedy
Masked Dithering of MASH Digital Delta-Sigma Modulators With Constant Inputs Using Multiple Linear Feedback Shift Registers. IEEE Trans. Circuits Syst. I Regul. Pap. (6) (2017)
Aidan Marnane, Valerio Marotta, Michael Peter Kennedy
Yet another spur mechanism in a charge-pump based Fractional-N PLL. ICECS (2016)
Hongjia Mo, Michael Peter Kennedy
Masked Dithering of MASH Digital Delta-Sigma Modulators with Constant Inputs Using Linear Feedback Shift Registers. IEEE Trans. Circuits Syst. I Regul. Pap. (8) (2016)
Dawei Mai, Hongjia Mo, Michael Peter Kennedy
Comments on "folding of phase noise spectra in charge-pump phase-locked loops induced by frequency division". ICECS (2016)
Hongjia Mo, Guosheng Hu, Michael Peter Kennedy
Comparison of analytical predictions of the noise floor due to static charge pump mismatch in fractional-n frequency synthesizers. ISCAS (2016)
Yann Donnelly, Michael Peter Kennedy
On the statistical properties of phase noise in Fractional-N frequency synthesizers using successive requantizers. ICECS (2016)
Hongjia Mo, Xiao Tan, Michael Peter Kennedy
Maximizing the fundamental period of a dithered digital delta-sigma modulator with constant input. ICECS (2016)
Michael Peter Kennedy, Hongjia Mo, Zhen Huang, Joao Paulo Lana
A method to quantify the dependence of spur heights on offset current in a CP-PLL. ISCAS (2016)
Valerio Marotta, Giuseppe Macera, Michael Peter Kennedy, Ettore Napoli
Comparative analysis of differential colpitts and cross-coupled VCOs in 180 nm Si-Ge HBT technology. ISCAS (2016)
Hongjia Mo, Michael Peter Kennedy
Effective (Spur-Free) dithering of digital delta-sigma modulators with pseudorandom dither. ECCTD (2015)
Michael Peter Kennedy, Hongjia Mo, Zhida Li, Guosheng Hu, Paolo Scognamiglio, Ettore Napoli
The noise and spur delusion in fractional-N frequency synthesizer design. ISCAS (2015)
Michael Peter Kennedy, Hongjia Mo, Brian Fitzgibbon
Spurious tones in digital delta-sigma modulators resulting from pseudorandom dither. J. Frankl. Inst. 352 (8) (2015)
Hongjia Mo, Michael Peter Kennedy
Comments on efficient dithering in digital delta-sigma modulator. ICECS (2014)
Michael Peter Kennedy, Hongjia Mo, Brian Fitzgibbon, Austin Harney, Hyman Shanan, Mike Keaveney
0.3-4.3 GHz Frequency-Accurate Fractional-N Frequency Synthesizer With Integrated VCO and Nested Mixed-Radix Digital Δ-Σ Modulator-Based Divider Controller. IEEE J. Solid State Circuits 49 (7) (2014)
Malik Summair Asghar, Muhammad Asfandyar Awan, Zhen Huang, Wenyuan Li, Michael Peter Kennedy, Antonio Buonomo, Alessandro Lo Schiavo
An LC CMOS injection-locked frequency divider for divide-by-two and divide-by-three operation. ECCTD (2013)
Michael Peter Kennedy, Brian Fitzgibbon, Austin Harney, Hyman Shanan, Mike Keaveney
High speed, high accuracy fractional-N frequency synthesizer using nested mixed-radix digital Δ-Σ modulators. ESSCIRC (2013)
Hongjia Mo, Michael Peter Kennedy, Vincent O'Brien, Brendan Mullane
Experimental validation of DAC with nested bus-splitting EFM4 DDSM. ECCTD (2013)
Hongjia Mo, Michael Peter Kennedy
A high-throughput spur-free hybrid nested bus-splitting/HK-MASH digital delta-sigma modulator. ECCTD (2013)
Michael Peter Kennedy, Brian Fitzgibbon, Kerry Dobmeier
Spurious tones in digital delta sigma modulators with pseudorandom dither. ISCAS (2013)
Vahideh Sadat Sadeghi, Hossein Miar Naimi, Michael Peter Kennedy
The Role of Charge Pump Mismatch in the Generation of Integer Boundary Spurs in Fractional-N Frequency Synthesizers: Why Worse Can Be Better. IEEE Trans. Circuits Syst. II Express Briefs (12) (2013)
Francesco Brandonisio, Alberto Prodomo, Michael Peter Kennedy, Ettore Napoli
Implementation of a pulse-holding Time-to-Digital Converter on an FPGA. ECCTD (2013)
Antonio Buonomo, Alessandro Lo Schiavo, Muhammad Asfandyar Awan, Malik Summair Asghar, Michael Peter Kennedy
A CMOS Injection-Locked Frequency Divider Optimized for Divide-by-Two and Divide-by-Three Operation. IEEE Trans. Circuits Syst. I Regul. Pap. (12) (2013)
Masfandyar Asfandyar Awan, Malik Summair Asghar, Michael Peter Kennedy
A "divide-by-odd number" direct injection CMOS LC injection-locked frequency divider. ICECS (2012)
Vahideh Sadat Sadeghi, Hossein Miar Naimi, Michael Peter Kennedy
A fast charge pump PLL using a bang-bang frequency comparator with dead zone. ISCAS (2012)
Brian Fitzgibbon, Michael Peter Kennedy, Franco Maloberti
Hardware Reduction in Digital Delta-Sigma Modulators via Bus-Splitting and Error Masking - Part II: Non-Constant Input. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2012)
Brian Fitzgibbon, Sudhakar Pamarti, Michael Peter Kennedy
A Spur-Free MASH DDSM With High-Order Filtered Dither. IEEE Trans. Circuits Syst. II Express Briefs (9) (2011)
Francesco Brandonisio, Michael Peter Kennedy
First order noise shaping in all digital PLLs. ISCAS (2011)
Antonio Buonomo, Michael Peter Kennedy, Alessandro Lo Schiavo
On the Synchronization Condition for Superharmonic Coupled QVCOs. IEEE Trans. Circuits Syst. I Regul. Pap. (7) (2011)
Brian Fitzgibbon, Michael Peter Kennedy
Calculation of Cycle Lengths in Higher Order Error Feedback Modulators With Constant Inputs. IEEE Trans. Circuits Syst. II Express Briefs (1) (2011)
Saeid Daneshgar, Oscar De Feo, Michael Peter Kennedy
Observations Concerning the Locking Range in a Complementary Differential LC Injection-Locked Frequency Divider - Part II: Design Methodology. IEEE Trans. Circuits Syst. I Regul. Pap. (4) (2011)
Brian Fitzgibbon, Michael Peter Kennedy, Franco Maloberti
A novel implementation of dithered digital delta-sigma modulators via bus-splitting. ISCAS (2011)
Michael Peter Kennedy, Xi Dong, Hongjia Mo
Phenomenological study of an injection-locked CMOS LC frequency divider with direct injection. ECCTD (2011)
Kaveh Hosseini, Brian Fitzgibbon, Michael Peter Kennedy
Observations Concerning the Generation of Spurious Tones in Digital Delta-Sigma Modulators Followed by a Memoryless Nonlinearity. IEEE Trans. Circuits Syst. II Express Briefs (11) (2011)
Brian Fitzgibbon, Michael Peter Kennedy, Franco Maloberti
Hardware Reduction in Digital Delta-Sigma Modulators Via Bus-Splitting and Error Masking - Part I: Constant Input. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2011)
Michael Peter Kennedy, Hongjia Mo, Xi Dong
Experimental characterization of Arnold tongues in injection-locked CMOS LC frequency dividers with tail and direct injection. ECCTD (2011)
Francesco Brandonisio, Michael Peter Kennedy, Franco Maloberti
First Order Noise Shaping Local-Oscillator Based Time-to-Digital Converter. ICECS (2010)
Brian Fitzgibbon, Michael Peter Kennedy
Calculation of the cycle length in a HK-MASH DDSM with multilevel quantizers. ISCAS (2010)
Brian Fitzgibbon, Michael Peter Kennedy
Calculation of cycle lengths in higher-order MASH DDSMs with constant inputs. ICECS (2010)
Paolo Maffezzoni, Dario D'Amore, Saeid Daneshgar, Michael Peter Kennedy
Analysis and Design of Injection-Locked Frequency Dividers by Means of a Phase-Domain Macromodel. IEEE Trans. Circuits Syst. I Regul. Pap. (11) (2010)
Antonio Buonomo, Michael Peter Kennedy, Alessandro Lo Schiavo
On the synchronization condition of second-harmonic coupled QVCOs. ISCAS (2010)
Saeid Daneshgar, Michael Peter Kennedy
A qualitative analysis of a complementary differential LC injection-locked frequency divider based on direct injection. ISCAS (2010)
Saeid Daneshgar, Oscar De Feo, Michael Peter Kennedy
Observations Concerning the Locking Range in a Complementary Differential LC Injection-Locked Frequency Divider - Part I: Qualitative Analysis. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2010)
Paolo Maffezzoni, Dario D'Amore, Saeid Daneshgar, Michael Peter Kennedy
Estimating the locking range of analog dividers through a phase-domain macromodel. ISCAS (2010)
Kaveh Hosseini, Michael Peter Kennedy, Stephen H. Lewis, Bernard C. Levy
Prediction of the Spectrum of a Digital Delta-Sigma Modulator Followed by a Polynomial Nonlinearity. IEEE Trans. Circuits Syst. I Regul. Pap. (8) (2010)
Zhipeng Ye, Michael Peter Kennedy
Hardware Reduction in Digital Delta-Sigma Modulators Via Error Masking - Part I: MASH DDSM. IEEE Trans. Circuits Syst. I Regul. Pap. (4) (2009)
Kieran O'Neill, Brian Fitzgibbon, Kaveh Hosseini, Michael Peter Kennedy
Calculation of cycle lengths in MASH 1-2-2 digital delta sigma modulators with a constant input. ECCTD (2009)
Brian Fitzgibbon, Kieran O'Neill, Andrew Grannell, Ciarán Horgan, Zhipeng Ye, Kaveh Hosseini, Michael Peter Kennedy
A spur-free MASH digital delta-sigma modulator with higher order shaped dither. ECCTD (2009)
Zhipeng Ye, Michael Peter Kennedy
Hardware Reduction in Digital Delta-Sigma Modulators Via Error Masking - Part II: SQ-DDSM. IEEE Trans. Circuits Syst. II Express Briefs (2) (2009)
Byungjin Chun, Michael Peter Kennedy
Statistical Properties of First-Order Bang-Bang PLL With Nonzero Loop Delay. IEEE Trans. Circuits Syst. II Express Briefs (10) (2008)
Zhipeng Ye, Michael Peter Kennedy
Design methodology for a dithered reduced complexity Digital MASH Delta-Sigma Modulator. ICECS (2008)
Kaveh Hosseini, Michael Peter Kennedy
Architectures for Maximum-Sequence-Length Digital Delta-Sigma Modulators. IEEE Trans. Circuits Syst. II Express Briefs (11) (2008)
Saeid Daneshgar, Michael Peter Kennedy
Design methodology for a divide-by-4 LC injection-locked frequency divider based on nonlinear analysis. ICECS (2008)
Carsten Wegener, Michael Peter Kennedy
Hard-Fault Detection and Diagnosis During the Application of Model-Based Data Converter Testing. J. Electron. Test. 23 (6) (2007)
Mohammad M. Ghahramani, Saeid Daneshgar, Michael Peter Kennedy, Oscar De Feo
Optimizing the design of an injection-locked frequency divider by means of nonlinear analysis. ECCTD (2007)

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Publication Activity (10 Years)

Top Topics

Top Venues

Michael Peter Kennedy