A 12.9-to-15.1GHz Digital PLL Based on a Bang-Bang Phase Detector with Adaptively Optimized Noise Shaping Achieving 107.6fs Integrated Jitter.

Mario Mercandelli Alessio Santiccioli Simone Mattia Dartizio Abanob Shehata Francesco Tesolin Saleh Karman Luca Bertulessi Francesco Buccoleri Luca Avallone Angelo Parisi Andrea Leonardo Lacaita Michael Peter Kennedy Carlo Samori Salvatore Levantino

Published in: ISSCC (2021)

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