Tzu-Chien Hsueh

Publication Activity (10 Years)

Years Active: 2009-2024
Publications (10 Years): 9

Top Topics

Variance Reduction

Digital Holography

Top Venues

IEEE J. Solid State Circuits

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Sumilak Chaudhury, Karl Johnson, Chengkuan Gao, Bill Lin, Yeshaiahu Fainman, Tzu-Chien Hsueh
Micro-Ring Modulator Linearity Enhancement for Analog and Digital Optical Links. CoRR (2024)
Tzu-Chien Hsueh, Yeshaiahu Fainman, Bill Lin
Monolithic Silicon-Photonics Linear-Algebra Accelerators Enabling Next-Gen Massive MIMO. CoRR (2024)
Ruoman Yang, Tony Wu, Tzu-Chien Hsueh
A High-Accuracy Single-Photon Time-Interval Measurement in Mega-Hz Detection Rates With Collaborative Variance Reduction: Theoretical Analysis and Realization Methodology. IEEE Trans. Circuits Syst. I Regul. Pap. 70 (1) (2023)
Tzu-Chien Hsueh, Yeshaiahu Fainman, Bill Lin
ChatGPT at the Speed of Light: Optical Comb-Based Monolithic Photonic-Electronic Linear-Algebra Accelerators. CoRR (2023)
Tony Wu, Ruoman Yang, Tzu-Chien Hsueh
Random Sampling-and-Averaging Techniques for Single-Photon Arrival-Time Detections in Quantum Applications: Theoretical Analysis and Realization Methodology. IEEE Trans. Circuits Syst. I Regul. Pap. 69 (4) (2022)
Sudip Shekhar, Rajesh Inti, James E. Jaussi, Tzu-Chien Hsueh, Bryan Casper
A Low-Power Bidirectional Link With a Direct Data-Sequencing Blind Oversampling CDR. IEEE J. Solid State Circuits 54 (6) (2019)
Sudip Shekhar, Rajesh Inti, James E. Jaussi, Tzu-Chien Hsueh, Bryan Casper
A 1.2-5Gb/s 1.4-2pJ/b serial link in 22nm CMOS with a direct data-sequencing blind oversampling CDR. VLSIC (2015)
Rajesh Inti, Sudip Shekhar, Ganesh Balamurugan, James E. Jaussi, Clark Roberts, Tzu-Chien Hsueh, Bryan Casper
A 0.5-to-0.75V, 3-to-8 Gbps/lane, 385-to-790 fJ/b, bi-directional, quad-lane forwarded-clock transceiver in 22nm CMOS. VLSIC (2015)
Tzu-Chien Hsueh, Frank O'Mahony, Mozhgan Mansuri, Bryan Casper
An On-Die All-Digital Power Supply Noise Analyzer With Enhanced Spectrum Measurements. IEEE J. Solid State Circuits 50 (7) (2015)
Tzu-Chien Hsueh, Frank O'Mahony, Mozhgan Mansuri, Bryan Casper
An on-die all-digital power supply noise analyzer with enhanced spectrum measurements. ESSCIRC (2014)
Tawfiq Musah, James E. Jaussi, Ganesh Balamurugan, Sami Hyvonen, Tzu-Chien Hsueh, Gokce Keskin, Sudip Shekhar, Joseph T. Kennedy, Shreyas Sen, Rajesh Inti, Mozhgan Mansuri, Michael Leddige, Bryce Horine, Clark Roberts, Randy Mooney, Bryan Casper
A 4-32 Gb/s Bidirectional Link With 3-Tap FFE/6-Tap DFE and Collaborative CDR in 22 nm CMOS. IEEE J. Solid State Circuits 49 (12) (2014)
James E. Jaussi, Ganesh Balamurugan, Sami Hyvonen, Tzu-Chien Hsueh, Tawfiq Musah, Gökçe Keskin, Sudip Shekhar, Joseph T. Kennedy, Shreyas Sen, Rajesh Inti, Mozhgan Mansuri, Michael Leddige, Bryce Horine, Clark Roberts, Randy Mooney, Bryan Casper
26.2 A 205mW 32Gb/s 3-Tap FFE/6-tap DFE bidirectional serial link in 22nm CMOS. ISSCC (2014)
Tzu-Chien Hsueh, Ganesh Balamurugan, James E. Jaussi, Sami Hyvonen, Joseph T. Kennedy, Gökçe Keskin, Tawfiq Musah, Sudip Shekhar, Rajesh Inti, Shreyas Sen, Mozhgan Mansuri, Clark Roberts, Bryan Casper
26.4 A 25.6Gb/s differential and DDR4/GDDR5 dual-mode transmitter with digital clock calibration in 22nm CMOS. ISSCC (2014)
Mozhgan Mansuri, James E. Jaussi, Joseph T. Kennedy, Tzu-Chien Hsueh, Sudip Shekhar, Ganesh Balamurugan, Frank O'Mahony, Clark Roberts, Randy Mooney, Bryan Casper
A scalable 0.128-to-1Tb/s 0.8-to-2.6pJ/b 64-lane parallel I/O in 32nm CMOS. ISSCC (2013)
Mozhgan Mansuri, James E. Jaussi, Joseph T. Kennedy, Tzu-Chien Hsueh, Sudip Shekhar, Ganesh Balamurugan, Frank O'Mahony, Clark Roberts, Randy Mooney, Bryan Casper
A Scalable 0.128-1 Tb/s, 0.8-2.6 pJ/bit, 64-Lane Parallel I/O in 32-nm CMOS. IEEE J. Solid State Circuits 48 (12) (2013)
Tzu-Chien Hsueh, Sudhakar Pamarti
A 16 Gb/s four-wire CDMA-based high speed I/O link with transmitter timing adjustment. CICC (2010)
Tzu-Chien Hsueh, Pin-En Su, Sudhakar Pamarti
A 3 , ˟, 3.8 Gb/s Four-Wire High Speed I/O Link Based on CDMA-Like Crosstalk Cancellation. IEEE J. Solid State Circuits 45 (8) (2010)
Tzu-Chien Hsueh, Pin-En Su, Sudhakar Pamarti
A 3×3.8Gb/s four-wire high speed I/O link based on CDMA-like crosstalk cancellation. CICC (2009)