Antonio Liscidini

Publication Activity (10 Years)

Years Active: 2005-2024
Publications (10 Years): 22

Top Topics

Cmos Technology

Top Venues

IEEE J. Solid State Circuits

IEEE Trans. Circuits Syst. II Express Briefs

Publications

John Zhong, Konstantinos Vasilakopoulos, Antonio Liscidini
4.5 A Reconfigurable, Multi-Channel Quantized-Analog Transmitter with <-35dB EVM and <-51dBc ACLR in 22nm FDSOI. ISSCC (2024)
Edoardo Bonizzoni, Sebastian Hoyos, Antonio Liscidini
Guest Editorial Special Issue on the 2024 IEEE International Symposium on Circuits and Systems. IEEE Trans. Circuits Syst. II Express Briefs 71 (5) (2024)
Tianwen Tang, Antonio Liscidini
A 22nm 56TOPS/W 6/8-bit Linearly-scalable R-2R Multiply-and-Accumulate Architecture with 2.2ns Latency. ESSCIRC (2023)
Xhulio Selmani, Gurjeet Singh, Rinaldo Castello, Antonio Liscidini
A 36 GHz Bandwidth, High Linear, Low Power, Driver Modulator, in 28 nm CMOS Technology Based on Quantized-Analog Signal Processing. ISCAS (2023)
Gurjeet Singh, Xhulio Selmani, Rinaldo Castello, Antonio Liscidini
A Wide Bandwidth, Low Power, Linear Quantized-Analog VGA in 28 nm CMOS Technology and 1.2V Supply. PRIME (2023)
Qingnan Yu, Tony Chan Carusone, Antonio Liscidini
Optimization of Quantized Analog Signal Processing Using Genetic Algorithms and μ-Law. IEEE Open J. Circuits Syst. 3 (2022)
Justin Yonghui Kim, Antonio Liscidini
A 2GHz voltage mode power scalable RF-Front-End with 2.5dB-NF and 0.5dBm-1dBCP. CICC (2022)
Saba Zargham, Zexi Ji, Antonio Liscidini
A 2.4-GHz 1.3-mW OQPSK RF Front-End TX Based on an Injection-Locked Power Amplifier. IEEE J. Solid State Circuits 56 (5) (2021)
Tuomas Haapala, Antonio Liscidini, Kari A. I. Halonen
Temperature Compensation of Crystal References in NB-IoT Modems. IEEE Trans. Circuits Syst. I Regul. Pap. (7) (2020)
Javid Musayev, Antonio Liscidini
A Quantized Analog RF Front End. IEEE J. Solid State Circuits 54 (7) (2019)
Sevil Zeynep Lulec, David A. Johns, Antonio Liscidini
A Third-Order Integrated Passive Switched-Capacitor Filter Obtained With a Continuous-Time Design Approach. IEEE Trans. Circuits Syst. I Regul. Pap. (10) (2019)
Zhonghong Jiang, David A. Johns, Antonio Liscidini
A low-power sub-GHz RF receiver front-end with enhanced blocker tolerance. CICC (2018)
Qiwei Wang, Hajime Shibata, Antonio Liscidini, Anthony Chan Carusone
A Digital Filtering ADC With Programmable Blocker Cancellation for Wireless Receivers. IEEE J. Solid State Circuits 53 (3) (2018)
Javid Musayev, Antonio Liscidini
Quantized Analog RX Front-End for SAW-Less Applications. ESSCIRC (2018)
Zexi Ji, Saba Zargham, Antonio Liscidini
Low-Power QPSK Transmitter Based on an Injection-Locked Power Amplifier. ESSCIRC (2018)
Qiwei Wang, Hajime Shibata, Anthony Chan Carusone, Antonio Liscidini
A LTE RX front-end with digitally programmable multi-band blocker cancellation in 28nm CMOS. CICC (2017)
Jan van Sinderen, Danielle Griffith, Ken Yamamoto, Antonio Liscidini, Young-sub Yuk
F4: Wireless low-power transceivers for local and wide-area networks. ISSCC (2017)
Qiwei Wang, Antonio Liscidini, Anthony Chan Carusone
Filtering ADCs for wireless receivers: A survey. MWSCAS (2017)
Edgar Sánchez-Sinencio, Jan Mulder, Antonio Liscidini, Eric A. M. Klumperink, Elad Alon
Introduction to the December Special Issue on the 2016 IEEE International Solid-State Circuits Conference. IEEE J. Solid State Circuits 51 (12) (2016)
Sevil Zeynep Lulec, David A. Johns, Antonio Liscidini
A Simplified Model for Passive-Switched-Capacitor Filters With Complex Poles. IEEE Trans. Circuits Syst. II Express Briefs (6) (2016)
Chuanwei Li, Antonio Liscidini
Class-C PA-VCO Cell for FSK and GFSK Transmitters. IEEE J. Solid State Circuits 51 (7) (2016)
Tian Ya Liu, Antonio Liscidini
20.9 A 1.92mW filtering transimpedance amplifier for RF current passive mixers. ISSCC (2016)
Anith Selvakumar, Antonio Liscidini
Current-Recycling Complex Filter for Bluetooth-Low-Energy Applications. IEEE Trans. Circuits Syst. II Express Briefs (4) (2015)
Anith Selvakumar, Meysam Zargham, Antonio Liscidini
Sub-mW Current Re-Use Receiver Front-End for Wireless Sensor Network Applications. IEEE J. Solid State Circuits 50 (12) (2015)
Anith Selvakumar, Meysam Zargham, Antonio Liscidini
13.6 A 600μW Bluetooth low-energy front-end receiver in 0.13μm CMOS technology. ISSCC (2015)
Chuanwei Li, Antonio Liscidini
A current re-use PA-VCO cell for low-power BLE transmitters. ESSCIRC (2015)
Alessandra Pipino, Antonio Liscidini, Karen Wan, Andrea Baschirotto
Bluetooth low energy receiver system design. ISCAS (2015)
Antonio Liscidini, Luca Fanori, Pietro Andreani, Rinaldo Castello
A Power-Scalable DCO for Multi-Standard GSM/WCDMA Frequency Synthesizers. IEEE J. Solid State Circuits 49 (3) (2014)
Nicola Codega, Paolo Rossi, Alberto Pirola, Antonio Liscidini, Rinaldo Castello
A Current-Mode, Low Out-of-Band Noise LTE Transmitter With a Class-A/B Power Mixer. IEEE J. Solid State Circuits 49 (7) (2014)
Marco Garampazzi, Stefano Dal Toso, Antonio Liscidini, Danilo Manstretta, P. Mendez, Luca Romanò, Rinaldo Castello
An Intuitive Analysis of Phase Noise Fundamental Limits Suitable for Benchmarking LC Oscillators. IEEE J. Solid State Circuits 49 (3) (2014)
Antonio Liscidini, SeongHwan Cho, Tony Chan Carusone, Tanay Karnik, Mike Keaveney, Brian Otis, Aaron Partridge, Christoph Sandner
F5: Frequency generation and clock distribution. ISSCC (2013)
Ivan Fabiano, Marco Sosio, Antonio Liscidini, Rinaldo Castello
SAW-Less Analog Front-End Receivers for TDD and FDD. IEEE J. Solid State Circuits 48 (12) (2013)
Ivan Fabiano, Marco Sosio, Antonio Liscidini, Rinaldo Castello
SAW-less analog front-end receivers for TDD and FDD. ISSCC (2013)
Marco Sosio, Antonio Liscidini, Rinaldo Castello
An Intuitive Current-Driven Passive Mixer Model Based on Switched-Capacitor Theory. IEEE Trans. Circuits Syst. II Express Briefs (2) (2013)
Paolo Rossi, Nicola Codega, Danilo Gerna, Antonio Liscidini, Daniele Ottini, Yong He, Alberto Pirola, Enrico Sacchi, Gregory Uehara, Chao Yang, Rinaldo Castello
An LTE transmitter using a class-A/B power mixer. ISSCC (2013)
Antonio Liscidini, Douglas Smith
Introduction to the Special Issue on the 38th European Solid-State Circuits Conference (ESSCIRC). IEEE J. Solid State Circuits 48 (7) (2013)
Nicola Codega, Antonio Liscidini, Rinaldo Castello
A low out-of-band noise LTE transmitter with current-mode approach. ESSCIRC (2013)
Ping Lu, Pietro Andreani, Antonio Liscidini
A 90nm CMOS gated-ring-oscillator-based 2-dimension Vernier time-to-digital converter. NORCHIP (2012)
Ping Lu, Antonio Liscidini, Pietro Andreani
A 3.6 mW, 90 nm CMOS Gated-Vernier Time-to-Digital Converter With an Equivalent Resolution of 3.2 ps. IEEE J. Solid State Circuits 47 (7) (2012)
Woogeun Rhee, Antonio Liscidini, Jae-Yoon Sim, Kenichi Okada, Sudhakar Pamarti
Clock/Frequency Generation Circuits and Systems. J. Electr. Comput. Eng. 2012 (2012)
Antonio Liscidini, Luca Fanori, Pietro Andreani, Rinaldo Castello
A 36mW/9mW power-scalable DCO in 55nm CMOS for GSM/WCDMA frequency synthesizers. ISSCC (2012)
Luca Vercesi, Luca Fanori, Fernando De Bernardinis, Antonio Liscidini, Rinaldo Castello
A Dither-Less All Digital PLL for Cellular Transmitters. IEEE J. Solid State Circuits 47 (8) (2012)
Luca Fanori, Antonio Liscidini, Pietro Andreani
A 6.7-to-9.2GHz 55nm CMOS hybrid Class-B/Class-C cellular TX VCO. ISSCC (2012)
Marco Sosio, Antonio Liscidini, Rinaldo Castello
A 2G/3G Cellular Analog Baseband Based on a Filtering ADC. IEEE Trans. Circuits Syst. II Express Briefs (4) (2012)
Ping Lu, Pietro Andreani, Antonio Liscidini
A 90nm CMOS gated-ring-oscillator-based Vernier time-to-digital converter for DPLLs. ESSCIRC (2011)
Luca Vercesi, Luca Fanori, Fernando De Bernardinis, Antonio Liscidini, Rinaldo Castello
A dither-less all digital PLL for cellular transmitters. CICC (2011)
Alberto Pirola, Antonio Liscidini, Rinaldo Castello
Corrections to "Current-Mode, WCDMA Channel Filter With In-Band Noise Shaping" [Sep 10 1770-1780]. IEEE J. Solid State Circuits 46 (2) (2011)
Marco Sosio, Antonio Liscidini, Rinaldo Castello, Fernando De Bernardinis
A complete DVB-T/ATSC tuner analog base-band implemented with a single filtering ADC. ESSCIRC (2011)
Luca Fanori, Antonio Liscidini, Rinaldo Castello
Capacitive Degeneration in LC-Tank Oscillator for DCO Fine-Frequency Tuning. IEEE J. Solid State Circuits 45 (12) (2010)
Luca Fanori, Antonio Liscidini, Rinaldo Castello
3.3GHz DCO with a frequency resolution of 150Hz for All-digital PLL. ISSCC (2010)
Alberto Pirola, Antonio Liscidini, Rinaldo Castello
Current-Mode, WCDMA Channel Filter With In-Band Noise Shaping. IEEE J. Solid State Circuits 45 (9) (2010)
Luca Vercesi, Antonio Liscidini, Rinaldo Castello
Two-Dimensions Vernier Time-to-Digital Converter. IEEE J. Solid State Circuits 45 (8) (2010)
Marika Tedeschi, Antonio Liscidini, Rinaldo Castello
Low-Power Quadrature Receivers for ZigBee (IEEE 802.15.4) Applications. IEEE J. Solid State Circuits 45 (9) (2010)
Antonio Liscidini, Luca Vercesi, Rinaldo Castello
Time to digital converter based on a 2-dimensions Vernier architecture. CICC (2009)
Antonio Liscidini, Alberto Pirola, Rinaldo Castello
A 1.25mW 75dB-SFDR CT filter with in-band noise reduction. ISSCC (2009)
Antonio Liscidini, Giuseppe Martini, Daniele Mastantuono, Rinaldo Castello
Analysis and Design of Configurable LNAs in Feedback Common-Gate Topologies. IEEE Trans. Circuits Syst. II Express Briefs (8) (2008)
Antonio Liscidini, Marika Tedeschi, Rinaldo Castello
Quadrature Front-End RX for ZigBee and WPAN Applications. ISSCC (2008)
Marika Tedeschi, Antonio Liscidini, Rinaldo Castello
A 0.23mm2 free coil ZigBee receiver based on a bond-wire self-oscillating mixer. ESSCIRC (2008)
Antonio Liscidini, Cesare Ghezzi, Emanuele Depaoli, Guido Albasini, Ivan Bietti, Rinaldo Castello
Common Gate Transformer Feedback LNA in a High IIP3 Current Mode RF CMOS Front-End. CICC (2006)
Antonio Liscidini, Andrea Mazzanti, Riccardo Tonietto, Luca Vandi, Pietro Andreani, Rinaldo Castello
Single-Stage Low-Power Quadrature RF Receiver Front-End: The LMV Cell. IEEE J. Solid State Circuits 41 (12) (2006)
Antonio Liscidini, Massimo Brandolini, Davide Sanzogni, Rinaldo Castello
A 0.13 μm CMOS front-end, for DCS1800/UMTS/802.11b-g with multiband positive feedback low-noise amplifier. IEEE J. Solid State Circuits 41 (4) (2006)
Antonio Liscidini, Andrea Mazzanti, Riccardo Tonietto, Luca Vandi, Pietro Andreani, Rinaldo Castello
A 5.4mW GPS CMOS Quadrature Front-End Based on a Single-Stage LNA-Mixer-VCO. ISSCC (2006)
Paolo Rossi, Antonio Liscidini, Massimo Brandolini, Francesco Svelto
A variable gain RF front-end, based on a Voltage-Voltage feedback LNA, for multistandard applications. IEEE J. Solid State Circuits 40 (3) (2005)