Francesco Svelto

Publication Activity (10 Years)

Years Active: 1993-2022
Publications (10 Years): 19

Top Topics

High Efficiency

Cmos Technology

Top Venues

IEEE J. Solid State Circuits

Publications

Farhad Bozorgi, Melchiorre Bruccoleri, Elham Rahimi, Matteo Repossi, Francesco Svelto, Andrea Mazzanti
Analog Front End of 50-Gb/s SiGe BiCMOS Opto-Electrical Receiver in 3-D-Integrated Silicon Photonics Technology. IEEE J. Solid State Circuits 57 (1) (2022)
Dan Li, Li Geng, Franco Maloberti, Francesco Svelto
Overcoming the Transimpedance Limit: A Tutorial on Design of Low-Noise TIA. IEEE Trans. Circuits Syst. II Express Briefs 69 (6) (2022)
Farhad Bozorgi, Melchiorre Bruccoleri, Matteo Repossi, Enrico Temporiti, Andrea Mazzanti, Francesco Svelto
A 26-Gb/s 3-D-Integrated Silicon Photonic Receiver in BiCMOS-55 nm and PIC25G With - 15.2-dBm OMA Sensitivity. ESSCIRC (2019)
Farshad Piri, Elham Rahimi, Matteo Bassi, Francesco Svelto, Andrea Mazzanti
70-90-GHz Self-Tuned Polyphase Filter for Wideband I/Q LO Generation in a 55-nm BiCMOS Transmitter. ESSCIRC (2019)
Elham Rahimi, Junlei Zhao, Francesco Svelto, Andrea Mazzanti
High-Efficiency SiGe-BiCMOS $E$ -Band Power Amplifiers Exploiting Current Clamping in the Common-Base Stage. IEEE J. Solid State Circuits 54 (8) (2019)
Farshad Piri, Matteo Bassi, Niccolo Lacaita, Andrea Mazzanti, Francesco Svelto
40dB IRR, 44% fractional-bandwidth ultra-wideband mm-wave quadrature LO generator for 5G networks in 55nm CMOS. ISSCC (2018)
Andrea Mazzanti, Elham Rahimi, Niccolo Lacaita, Junlei Zhao, Matteo Bassi, Francesco Svelto
Low phase noise K-band VCO and high efficiency E-band power amplifier for mobile network backhaul in SiGe BiCMOS. ICICDT (2018)
Niccolo Lacaita, Matteo Bassi, Andrea Mazzanti, Francesco Svelto
A K-band low-noise bipolar class-C VCO for 5G backhaul systems in 55 nm BiCMOS technology. Integr. 63 (2018)
Farshad Piri, Matteo Bassi, Niccolo Lacaita, Andrea Mazzanti, Francesco Svelto
A PVT-Tolerant >40-dB IRR, 44% Fractional-Bandwidth Ultra-Wideband mm-Wave Quadrature LO Generator for 5G Networks in 55-nm CMOS. IEEE J. Solid State Circuits 53 (12) (2018)
Junlei Zhao, Elham Rahimi, Francesco Svelto, Andrea Mazzanti
2.6 A SiGe BiCMOS E-band power amplifier with 22% PAE at 18dBm OP1dB and 8.5% at 6dB back-off leveraging current clamping in a common-base stage. ISSCC (2017)
Lorenzo Iotti, Matteo Bassi, Andrea Mazzanti, Francesco Svelto
Design of low-power wideband frequency quadruplers based on transformer-coupled resonators for E-Band backhaul applications. Integr. 58 (2017)
Lorenzo Iotti, Andrea Mazzanti, Francesco Svelto
Insights Into Phase-Noise Scaling in Switch-Coupled Multi-Core LC VCOs for E-Band Adaptive Modulation Links. IEEE J. Solid State Circuits 52 (7) (2017)
Enrico Temporiti, Gabriele Minoia, Matteo Repossi, Daniele Baldi, Andrea Ghilioni, Francesco Svelto
23.4 A 56Gb/s 300mW silicon-photonics transmitter in 3D-integrated PIC25G and 55nm BiCMOS technologies. ISSCC (2016)
Lorenzo Iotti, Andrea Mazzanti, Francesco Svelto
A multi-core VCO and a frequency quadrupler for E-Band adaptive-modulation links in 55nm BiCMOS. ESSCIRC (2016)
Dan Li, Gabriele Minoia, Matteo Repossi, Daniele Baldi, Andrea Ghilioni, Enrico Temporiti, Francesco Svelto
A 25Gb/s 3D-integrated silicon photonics receiver in 65nm CMOS and PIC25G for 100GbE optical links. ISCAS (2016)
Enrico Temporiti, Andrea Ghilioni, Gabriele Minoia, Piero Orlandi, Matteo Repossi, Daniele Baldi, Francesco Svelto
Insights Into Silicon Photonics Mach-Zehnder-Based Optical Transmitter Architectures. IEEE J. Solid State Circuits 51 (12) (2016)
Marco Cignoli, Gabriele Minoia, Matteo Repossi, Daniele Baldi, Andrea Ghilioni, Enrico Temporiti, Francesco Svelto
22.9 A 1310nm 3D-integrated silicon photonics Mach-Zehnder-based transmitter with 275mW multistage CMOS driver achieving 6dB extinction ratio at 25Gb/s. ISSCC (2015)
Junlei Zhao, Matteo Bassi, Andrea Mazzanti, Francesco Svelto
A 15 GHz-bandwidth 20dBm PSAT power amplifier with 22% PAE in 65nm CMOS. CICC (2015)
Matteo Bassi, Junlei Zhao, Andrea Bevilacqua, Andrea Ghilioni, Andrea Mazzanti, Francesco Svelto
and 16% PAE in 28 nm CMOS LP. IEEE J. Solid State Circuits 50 (7) (2015)
Dario Bianchi, Fabio Quaglia, Andrea Mazzanti, Francesco Svelto
Analysis and Design of a High Voltage Integrated Class-B Amplifier for Ultra-Sound Transducers. IEEE Trans. Circuits Syst. I Regul. Pap. (7) (2014)
Dan Li, Gabriele Minoia, Matteo Repossi, Daniele Baldi, Enrico Temporiti, Andrea Mazzanti, Francesco Svelto
A Low-Noise Design Technique for High-Speed CMOS Optical Receivers. IEEE J. Solid State Circuits 49 (6) (2014)
Enrico Temporiti, Gabriele Minoia, Matteo Repossi, Daniele Baldi, Andrea Ghilioni, Francesco Svelto
A 3D-integrated 25Gbps silicon photonics receiver in PIC25G and 65nm CMOS technologies. ESSCIRC (2014)
Junlei Zhao, Matteo Bassi, Andrea Bevilacqua, Andrea Ghilioni, Andrea Mazzanti, Francesco Svelto
A 40-67GHz power amplifier with 13dBm PSAT and 16% PAE in 28 nm CMOS LP. ESSCIRC (2014)
Andrea Ghilioni, Andrea Mazzanti, Francesco Svelto
Analysis and Design of mm-Wave Frequency Dividers Based on Dynamic Latches With Load Modulation. IEEE J. Solid State Circuits 48 (8) (2013)
Dario Bianchi, Fabio Quaglia, Andrea Mazzanti, Francesco Svelto
High-voltage integrated Class-B amplifier for ultrasound transducers. ICICDT (2013)
Enrico Mammei, Enrico Monaco, Andrea Mazzanti, Francesco Svelto
A 33.6-to-46.2GHz 32nm CMOS VCO with 177.5dBc/Hz minimum noise FOM using inductor splitting for tuning extension. ISSCC (2013)
Dan Li, Gabriele Minoia, Matteo Repossi, Daniele Baldi, Enrico Temporiti, Andrea Mazzanti, Francesco Svelto
A 25Gb/s low noise 65nm CMOS receiver tailored to 100GBASE-LR4. ESSCIRC (2012)
Andrea Ghilioni, Ugo Decanis, Andrea Mazzanti, Francesco Svelto
A 4.8mW inductorless CMOS frequency divider-by-4 with more than 60% fractional bandwidth up to 70GHz. CICC (2012)
Dario Bianchi, Fabio Quaglia, Andrea Mazzanti, Francesco Svelto
A 90Vpp 720MHz GBW linear power amplifier for ultrasound imaging transmitters in BCD6-SOI. ISSCC (2012)
Andrea Ghilioni, Ugo Decanis, Enrico Monaco, Andrea Mazzanti, Francesco Svelto
A 6.5mW inductorless CMOS frequency divider-by-4 operating up to 70GHz. ISSCC (2011)
Ugo Decanis, Andrea Ghilioni, Enrico Monaco, Andrea Mazzanti, Francesco Svelto
A mm-Wave quadrature VCO based on magnetically coupled resonators. ISSCC (2011)
Andrea Mazzanti, Marco Sosio, Matteo Repossi, Francesco Svelto
A 24 GHz Subharmonic Direct Conversion Receiver in 65 nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2011)
Ugo Decanis, Andrea Ghilioni, Enrico Monaco, Andrea Mazzanti, Francesco Svelto
A Low-Noise Quadrature VCO Based on Magnetically Coupled Resonators and a Wideband Frequency Divider at Millimeter Waves. IEEE J. Solid State Circuits 46 (12) (2011)
Federico Vecchi, Stefano Bozzola, Enrico Temporiti, Davide Guermandi, Massimo Pozzoni, Matteo Repossi, Marco Cusmai, Ugo Decanis, Andrea Mazzanti, Francesco Svelto
A Wideband Receiver for Multi-Gbit/s Communications in 65 nm CMOS. IEEE J. Solid State Circuits 46 (3) (2011)
Colin Weltin-Wu, Enrico Temporiti, Marco Cusmai, Daniele Baldi, Francesco Svelto
Insights Into Wideband Fractional ADPLLs: Modeling and Calibration of Nonlinearity Induced Fractional Spurs. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2010)
Andrea Mazzanti, Mohammad B. Vahidfar, Marco Sosio, Francesco Svelto
A Low Phase-Noise Multi-Phase LO Generator for Wideband Demodulators Based on Reconfigurable Sub-Harmonic Mixers. IEEE J. Solid State Circuits 45 (10) (2010)
Colin Weltin-Wu, Enrico Temporiti, Daniele Baldi, Marco Cusmai, Francesco Svelto
A 3.5GHz wideband ADPLL with fractional spur suppression through TDC dithering and feedforward compensation. ISSCC (2010)
Federico Vecchi, Stefano Bozzola, Massimo Pozzoni, Davide Guermandi, Enrico Temporiti, Matteo Repossi, Ugo Decanis, Andrea Mazzanti, Francesco Svelto
A wideband mm-Wave CMOS receiver for Gb/s communications employing interstage coupled resonators. ISSCC (2010)
Massimo Pozzoni, Simone Erba, Davide Sanzogni, Marcello Ganzerli, Paolo Viola, Daniele Baldi, Matteo Repossi, Giorgio Spelgatti, Francesco Svelto
A 12Gb/s 39dB loss-recovery unclocked-DFE receiver with bi-dimensional equalization. ISSCC (2010)
Enrico Monaco, Massimo Pozzoni, Francesco Svelto, Andrea Mazzanti
Injection-Locked CMOS Frequency Doublers for μ -Wave and mm-Wave Applications. IEEE J. Solid State Circuits 45 (8) (2010)
Andrea Mazzanti, Enrico Monaco, Massimo Pozzoni, Francesco Svelto
A 13.1% tuning range 115GHz frequency generator based on an injection-locked frequency doubler in 65nm CMOS. ISSCC (2010)
Enrico Temporiti, Colin Weltin-Wu, Daniele Baldi, Marco Cusmai, Francesco Svelto
A 3.5 GHz Wideband ADPLL With Fractional Spur Suppression Through TDC Dithering and Feedforward Compensation. IEEE J. Solid State Circuits 45 (12) (2010)
Enrico Temporiti, Colin Weltin-Wu, Daniele Baldi, Riccardo Tonietto, Francesco Svelto
Insights into wideband fractional All-Digital PLLs for RF applications. CICC (2009)
Enrico Monaco, Mattia Borgarino, Francesco Svelto, Andrea Mazzanti
A 5.2mW ku-band CMOS injection-locked frequency doubler with differential input / output. CICC (2009)
Stefano Bozzola, Davide Guermandi, Federico Vecchi, Matteo Repossi, Massimo Pozzoni, Andrea Mazzanti, Francesco Svelto
A sliding IF receiver for mm-wave WLANs in 65nm CMOS. CICC (2009)
Massimo Pozzoni, Simone Erba, Paolo Viola, Matteo Pisati, Emanuele Depaoli, Davide Sanzogni, Riccardo Brama, Daniele Baldi, Matteo Repossi, Francesco Svelto
A Multi-Standard 1.5 to 10 Gb/s Latch-Based 3-Tap DFE Receiver With a SSC Tolerant CDR for Serial Backplane Communication. IEEE J. Solid State Circuits 44 (4) (2009)
Enrico Temporiti, Colin Weltin-Wu, Daniele Baldi, Riccardo Tonietto, Francesco Svelto
A 3 GHz Fractional All-Digital PLL With a 1.8 MHz Bandwidth Implementing Spur Reduction Techniques. IEEE J. Solid State Circuits 44 (3) (2009)
Andrea Mazzanti, Mohammad B. Vahidfar, Marco Sosio, Francesco Svelto
A reconfigurable demodulator with 3-to-5GHz agile synthesizer for 9-band WiMedia UWB in 65nm CMOS. ISSCC (2009)
Federico Vecchi, Matteo Repossi, Wissam Eyssa, Paolo Arcioni, Francesco Svelto
Design of Low-Loss Transmission Lines in Scaled CMOS by Accurate Electromagnetic Simulations. IEEE J. Solid State Circuits 44 (9) (2009)
Simone Erba, Massimo Pozzoni, Matteo Pisati, Riccardo Brama, Davide Sanzogni, Emanuele Depaoli, Paolo Viola, Francesco Svelto
A 10Gb/s receiver with linear backplane equalization and mixer-based self-aligned CDR. CICC (2008)
Riccardo Brama, Luca Larcher, Andrea Mazzanti, Francesco Svelto
A 30.5 dBm 48% PAE CMOS Class-E PA With Integrated Balun for RF Applications. IEEE J. Solid State Circuits 43 (8) (2008)
Colin Weltin-Wu, Enrico Temporiti, Daniele Baldi, Francesco Svelto
A 3GHz Fractional-N All-Digital PLL with Precise Time-to-Digital Converter Calibration and Mismatch Correction. ISSCC (2008)
Andrea Mazzanti, Marco Sosio, Matteo Repossi, Francesco Svelto
A 24GHz Sub-Harmonic Receiver Front-End with Integrated Multi-Phase LO Generation in 65nm CMOS. ISSCC (2008)
Stefan Heinen, Francesco Svelto, Jan Craninckx, Mototsugu Hamada, Domine Leenaerts, Chris Rudell
Architectures and Circuit Techniques for Nanoscale RF CMOS (Forum). ISSCC (2008)
Valentina Della Torre, Matteo Conta, Ramesh Chokkalingam, Giuseppe Cusmai, Paolo Rossi, Francesco Svelto
Fully Integrated GPS Radio for Location Based Services. IEEE J. Solid State Circuits 42 (3) (2007)
Andrea Mazzanti, Luca Larcher, Francesco Svelto
CMOS balanced regenerative frequency dividers for wide-band quadrature LO generation. Microelectron. J. 38 (10-11) (2007)
Massimo Brandolini, Marco Sosio, Francesco Svelto
A 750 mV Fully Integrated Direct Conversion Receiver Front-End for GSM in 90-nm CMOS. IEEE J. Solid State Circuits 42 (6) (2007)
Giuseppe Cusmai, Matteo Repossi, Guido Albasini, Francesco Svelto
A 3.2-to-7.3GHz Quadrature Oscillator with Magnetic Tuning. ISSCC (2007)
Giuseppe Cusmai, Matteo Repossi, Guido Albasini, Andrea Mazzanti, Francesco Svelto
A Magnetically Tuned Quadrature Oscillator. IEEE J. Solid State Circuits 42 (12) (2007)
Riccardo Brama, Luca Larcher, Andrea Mazzanti, Francesco Svelto
A 1.7-GHz 31dBm differential CMOS Class-E Power Amplifier with 58% PAE. CICC (2007)
Andrea Mazzanti, Francesco Svelto
A 1.8-GHz injection-locked quadrature CMOS VCO with low phase noise and high phase accuracy. IEEE Trans. Circuits Syst. I Regul. Pap. (3) (2006)
Andrea Mazzanti, Luca Larcher, Riccardo Brama, Francesco Svelto
Analysis of reliability and power efficiency in cascode class-E PAs. IEEE J. Solid State Circuits 41 (5) (2006)
Valentina Della Torre, Matteo Conta, Ramesh Chokkalingam, Giuseppe Cusmai, Paolo Rossi, Francesco Svelto
A 20mw 3.24mm2 fully integrated gps radio for cell-phones. ISSCC (2006)
Andrea Mazzanti, Francesco Svelto
CMOS injection locked oscillators for quadrature generation at radio-frequency. Microelectron. J. 37 (11) (2006)
Massimo Brandolini, Marco Sosio, Francesco Svelto
A 750mV 15kHz 1/f Noise Corner 51dBm IIP2 Direct-Conversion Front-End for GSM in 90nm CMOS. ISSCC (2006)
Giuseppe Cusmai, Massimo Brandolini, Paolo Rossi, Francesco Svelto
A 0.18-$muhbox m$CMOS Selective Receiver Front-End for UWB Applications. IEEE J. Solid State Circuits 41 (8) (2006)
Massimo Brandolini, Paolo Rossi, Davide Sanzogni, Francesco Svelto
A +78 dBm IIP2 CMOS direct downconversion mixer for fully integrated UMTS receivers. IEEE J. Solid State Circuits 41 (3) (2006)
Andrea Mazzanti, Luca Larcher, Francesco Svelto
Balanced CMOS LC-tank analog frequency dividers for quadrature LO generation. CICC (2005)
Giuseppe Cusmai, Massimo Brandolini, Paolo Rossi, Francesco Svelto
An interference robust 0.18μm CMOS 3.1-8GHz receiver front-end for UWB radio. CICC (2005)
Andrea Bevilacqua, Francesco Svelto
Statistical analysis of second-order intermodulation distortion in WCDMA direct conversion receivers. IEEE Trans. Circuits Syst. II Express Briefs (3) (2005)
Mohammad Yavari, Omid Shoaei, Francesco Svelto
Hybrid cascode compensation for two-stage CMOS operational amplifiers. ISCAS (2) (2005)
Paolo Rossi, Antonio Liscidini, Massimo Brandolini, Francesco Svelto
A variable gain RF front-end, based on a Voltage-Voltage feedback LNA, for multistandard applications. IEEE J. Solid State Circuits 40 (3) (2005)
Andrea Mazzanti, Paola Uggetti, Francesco Svelto
Analysis and design of injection-locked LC dividers for quadrature generation. IEEE J. Solid State Circuits 39 (9) (2004)
Francesco Gatta, Danilo Manstretta, Paolo Rossi, Francesco Svelto
A fully integrated 0.18-μm CMOS direct conversion receiver front-end with on-chip LO for UMTS. IEEE J. Solid State Circuits 39 (1) (2004)
Andrea Mazzanti, Paola Uggetti, Raffaele Battaglia, Francesco Svelto
Analysis and design of a dual band reconfigurable VCO. ICECS (2004)
F. De Bernarclinis, S. Gambini, R. Vincis, Francesco Svelto
Design space exploration for a UMTS front-end exploiting analog platforms. ICCAD (2004)
Andrea Mazzanti, Paola Uggetti, Paolo Rossi, Francesco Svelto
Injection locking LC dividers for low power quadrature generation. CICC (2003)
Danilo Manstretta, Massimo Brandolini, Francesco Svelto
Second-order intermodulation mechanisms in CMOS downconverters. IEEE J. Solid State Circuits 38 (3) (2003)
Danilo Manstretta, Francesco Svelto
Analysis and optimization of IIP2 in CMOS direct down-converters. CICC (2002)
Francesco Svelto, Stefano Deantoni, Giampiero Montagna, Rinaldo Castello
Implementation of a CMOS LNA plus mixer for GPS applications with no external components. IEEE Trans. Very Large Scale Integr. Syst. 9 (1) (2001)
Francesco Gatta, Enrico Sacchi, Francesco Svelto, Paolo Vilmercati, Rinaldo Castello
A 2-dB noise figure 900-MHz differential CMOS LNA. IEEE J. Solid State Circuits 36 (10) (2001)
Francesco Svelto, Giampiero Montagna, Stefano Deantoni, Giulio Braschi, Rinaldo Castello
Solutions for image rejection CMOS LNA. ISCAS (2000)
Francesco Svelto, Stefano Deantoni, Giampiero Montagna, Rinaldo Castello
An 8mA, 3.8dB NF, 40dB gain CMOS front-end for GPS applications. ISLPED (2000)
Francesco Svelto, Stefano Deantoni, Rinaldo Castello
A 1.3 GHz low-phase noise fully tunable CMOS LC VCO. IEEE J. Solid State Circuits 35 (3) (2000)
Francesco Svelto, Stefano Deantoni, Rinaldo Castello
A 1 mA, -120.5 dbc/Hz at 600 kHz from 1.9 GHz fully tuneable LC CMOS VCO. CICC (2000)
Francesco Svelto, Matteo Conta, Valentina Della Torre, Rinaldo Castello
A low-voltage topology for CMOS RF mixers. IEEE Trans. Consumer Electron. 45 (2) (1999)
Francesco Svelto, Stefano Deantoni, Rinaldo Castello
A 1.3 GHz CMOS VCO with 28% frequency tuning. CICC (1999)
Paolo Arcioni, Rinaldo Castello, Giuseppe De Astis, Enrico Sacchi, Francesco Svelto
Measurement and modeling of Si integrated inductors. IEEE Trans. Instrum. Meas. 47 (5) (1998)
Francesco Svelto
Very accurate high-frequency noise spectral analysis of P-channel FET's. IEEE Trans. Instrum. Meas. 47 (2) (1998)
Andrea Baschirotto, Giovanni Cesura, Francesco Rezzi, Francesco Svelto
A BiCMOS Tunable Shaper for Detectors of Elementary Particles. ISCAS (1993)