A 25Gb/s low noise 65nm CMOS receiver tailored to 100GBASE-LR4.
Dan LiGabriele MinoiaMatteo RepossiDaniele BaldiEnrico TemporitiAndrea MazzantiFrancesco SveltoPublished in: ESSCIRC (2012)
Keyphrases
- high speed
- high noise
- low signal to noise ratio
- noise level
- silicon on insulator
- noise reduction
- median filter
- vlsi circuits
- random noise
- noise model
- logistic regression
- low resolution
- image noise
- power consumption
- circuit design
- power supply
- metal oxide
- low cost
- noisy images
- signal to noise ratio
- real time
- noisy data
- input data
- signal noise ratio
- nm technology