and 16% PAE in 28 nm CMOS LP.
Matteo BassiJunlei ZhaoAndrea BevilacquaAndrea GhilioniAndrea MazzantiFrancesco SveltoPublished in: IEEE J. Solid State Circuits (2015)
Keyphrases
- cmos technology
- silicon on insulator
- metal oxide semiconductor
- nm technology
- linear programming
- power consumption
- low power
- linear program
- low cost
- high speed
- analog vlsi
- low voltage
- power supply
- objective function
- circuit design
- real time
- delay insensitive
- focal plane
- infrared
- lp norm
- np hard
- integrated circuit
- case study
- ibm power processor
- special case
- power dissipation
- simplex method
- single chip
- vlsi circuits
- cmos image sensor
- algorithm for linear programming
- image sensor
- parallel processing
- image processing