Rinaldo Castello

ORCID

Publication Activity (10 Years)

Years Active: 1992-2023
Publications (10 Years): 29

Top Venues

IEEE J. Solid State Circuits

ESSCIRC

A-SSCC

ISCAS

Publications

Simone Lecchi, Danilo Manstretta, Rinaldo Castello
An Interferer-Tolerant RX with Translational Positive Feedback for 5G NR Applications Achieving 3.4 dB NF and 18 dBm OOB IIP3. ESSCIRC (2023)
Xhulio Selmani, Gurjeet Singh, Rinaldo Castello, Antonio Liscidini
A 36 GHz Bandwidth, High Linear, Low Power, Driver Modulator, in 28 nm CMOS Technology Based on Quantized-Analog Signal Processing. ISCAS (2023)
Gurjeet Singh, Xhulio Selmani, Rinaldo Castello, Antonio Liscidini
A Wide Bandwidth, Low Power, Linear Quantized-Analog VGA in 28 nm CMOS Technology and 1.2V Supply. PRIME (2023)
Rinaldo Castello
Reminiscing through 40 years of CMOS analog circuit design: from audio to GHz. ESSCIRC (2022)
Nimesh Nadishka Miral, Karan Sohal, Danilo Manstretta, Rinaldo Castello
Filtering Trans-Impedance Amplifiers: from mW of Power to GHz of Bandwidth. CICC (2022)
Jin Jin, Jianhui Wu, Rinaldo Castello, Danilo Manstretta
A 400-μW IoT Low-IF Voltage-Mode Receiver Front-End With Charge-Sharing Complex Filter. IEEE J. Solid State Circuits 57 (7) (2022)
Nicola Cordioli, Danilo Manstretta, Rinaldo Castello
A 58 GHz Bandwidth, and less than 1.8% THD, Mach-Zehnder Driver, in 28 nm CMOS Technology. ESSCIRC (2022)
Jin Jin, Simone Lecchi, Rinaldo Castello, Danilo Manstretta
An FDD Auxiliary Receiver with a Highly Linear Low Noise Amplifier. ESSCIRC (2022)
Karan Sohal, Danilo Manstretta, Rinaldo Castello
Order Current-Mode Filter with 14dB Variable Gain and 650MHz to 1GHz Tuning-Range in 28nm CMOS. ISCAS (2021)
Jin Jin, Jianhui Wu, Rinaldo Castello, Danilo Manstretta
A 400-µW Low-IF IoT Receiver Front-End with Tunable Charge-Sharing Complex Filter. ESSCIRC (2021)
Nimesh Nadishka Miral, Danilo Manstretta, Rinaldo Castello
A 17 mW 33 dBm IB-OIP3 0.5-1.5 GHz Bandwidth TIA Based on an Inductor-Stabilized OTA. ESSCIRC (2021)
Mohsen Javadi, Hossein Miar Naimi, Saheed Tijani, Danilo Manstretta, Rinaldo Castello
A Highly Linear SAW-Less Noise-Canceling Receiver With Shared TIAs Architecture. IEEE Trans. Very Large Scale Integr. Syst. 29 (7) (2021)
Giacomo Pini, Danilo Manstretta, Rinaldo Castello
Analysis and Design of a 260-MHz RF Bandwidth +22-dBm OOB-IIP3 Mixer-First Receiver With Third-Order Current-Mode Filtering TIA. IEEE J. Solid State Circuits 55 (7) (2020)
Giacomo Pini, Danilo Manstretta, Rinaldo Castello
A 260-MHz RF Bandwidth Mixer-First Receiver With Third-Order Current-Mode Filtering TIA. ESSCIRC (2019)
Mohammadmehdi Deilam Salehi, Danilo Manstretta, Rinaldo Castello
A 150-MHz TIA with un-Conventional OTA Stabilization Technique via Local Active Feed-Back. PRIME (2019)
Ehsan Kargaran, Danilo Manstretta, Rinaldo Castello
A 1.5-2.8 GHz current-mode LNTA achieving >25 dBm IIP3 and +8 dBm P-1dB gain compression. Microelectron. J. 86 (2019)
Ehsan Kargaran, Carl Bryant, Danilo Manstretta, Jon Strange, Rinaldo Castello
Receiver Front-End for Bluetooth Low Energy (BLE) in 22 nm FD-SOI with Zero External Components. A-SSCC (2019)
Arianna Coccia, Danilo Manstretta, Rinaldo Castello, Luca Fanori
A Wideband Saw-Less Transmitter Operating in Closed-Loop With Embedded N-Path Filtering. CICC (2019)
Ehsan Kargaran, Danilo Manstretta, Rinaldo Castello
Design and Analysis of 2.4 GHz 30~µW CMOS LNAs for Wearable WSN Applications. IEEE Trans. Circuits Syst. I Regul. Pap. (3) (2018)
Giacomo Pini, Danilo Manstretta, Rinaldo Castello
Analysis and Design of a 20-MHz Bandwidth, 50.5-dBm OOB-IIP3, and 5.4-mW TIA for SAW-Less Receivers. IEEE J. Solid State Circuits 53 (5) (2018)
Daniele Montanari, Gerardo Castellano, Ehsan Kargaran, Giacomo Pini, Saheed Tijani, Davide De Caro, Antonio Giuseppe Maria Strollo, Danilo Manstretta, Rinaldo Castello
An FDD Wireless Diversity Receiver With Transmitter Leakage Cancellation in Transmit and Receive Bands. IEEE J. Solid State Circuits 53 (7) (2018)
Ehsan Kargaran, Danilo Manstretta, Rinaldo Castello
A Sub-1V, 220 μW Receiver Frontend for Wearable Wireless Sensor Network Applications. ISCAS (2018)
D. Prevcdelli, Giacomo Pini, Danilo Manstretta, Rinaldo Castello
A Mixer-1st Auxiliary Receiver for Full-Duplex Self-Interference Cancellation. NGCAS (2018)
Arianna Coccia, Saheed Tijani, Danilo Manstretta, Rinaldo Castello
A TVWS receiver with balanced output self-calibrated IIP2 LNTA employing a low-noise current multiplier. Integr. 63 (2018)
Ehsan Kargaran, Danilo Manstretta, Rinaldo Castello
A Sub-IV, 72 μW Stacked LNA-VCO for Wireless Sensor Network Applications. PRIME (2018)
Matteo Ramella, Ivan Fabiano, Danilo Manstretta, Rinaldo Castello
A SAW-Less 2.4-GHz Receiver Front-End With 2.4-mA Battery Current for SoC Coexistence. IEEE J. Solid State Circuits 52 (9) (2017)
Danilo Montanari, Danilo Manstretta, Rinaldo Castello, Gerardo Castellano
A 0.7-2 GHz auxiliary receiver with enhanced compression for SAW-less FDD. ESSCIRC (2017)
Ehsan Kargaran, Danilo Manstretta, Rinaldo Castello
A 30μW, 3.3dB NF CMOS LNA for wearable WSN applications. ISCAS (2017)
Giacomo Pini, Danilo Manstretta, Rinaldo Castello
Highly linear TIA for SAW-less FDD receivers. A-SSCC (2016)
Matteo Ramella, Ivan Fabiano, Danilo Manstretta, Rinaldo Castello
A 1.7-2.1GHz +23dBm TX power compatible blocker tolerant FDD receiver with integrated duplexer in 28nm CMOS. A-SSCC (2015)
Matteo Ramella, Ivan Fabiano, Danilo Manstretta, Rinaldo Castello
A 2.4GHz low-power SAW-less receiver for SoC coexistence. A-SSCC (2015)
Marco Garampazzi, Paulo M. Mendes, Nicola Codega, Danilo Manstretta, Rinaldo Castello
Analysis and Design of a 195.6 dBc/Hz Peak FoM P-N Class-B Oscillator With Transformer-Based Tail Filtering. IEEE J. Solid State Circuits 50 (7) (2015)
Antonio Liscidini, Luca Fanori, Pietro Andreani, Rinaldo Castello
A Power-Scalable DCO for Multi-Standard GSM/WCDMA Frequency Synthesizers. IEEE J. Solid State Circuits 49 (3) (2014)
Elisa Girard, Nicola Codega, Rinaldo Castello
A low power/noise emission LTE fully class A/B transmitter with a programmable output balun. ICECS (2014)
Nicola Codega, Paolo Rossi, Alberto Pirola, Antonio Liscidini, Rinaldo Castello
A Current-Mode, Low Out-of-Band Noise LTE Transmitter With a Class-A/B Power Mixer. IEEE J. Solid State Circuits 49 (7) (2014)
Marco Garampazzi, Paulo M. Mendes, Nicola Codega, Danilo Manstretta, Rinaldo Castello
A 195.6dBc/Hz peak FoM P-N class-B oscillator with transformer-based tail filtering. ESSCIRC (2014)
Shahrzad Tadjpour, Paolo Rossi, Luca Romanò, Ramesh Chokkalingam, Hamid Firouzkouhi, Feng Shi, M. Leroux, Danilo Gerna, A. Venca, John Vasa, Bala Ramachandran, Brian Brunn, Alberto Pirola, Daniele Ottini, A. Milani, Enrico Sacchi, M. Behera, X. Chen, U. Decanis, Marika Tedeschi, S. DalToso, W. Eyssa, C. Cakir, C. Prakash, Yong He, Nader Damavandi, R. Srinivasan, Dan Shum, X. Fan, C. Yu, Engin Pehlivanoglu, Hossein Zarei, Aravind Loke, Gregory Uehara, Rinaldo Castello, Y. Song
A multi-band Rel9 WCDMA/HSDPA/TDD LTE and FDD LTE transceiver with envelope tracking. ESSCIRC (2014)
Marco Garampazzi, Stefano Dal Toso, Antonio Liscidini, Danilo Manstretta, P. Mendez, Luca Romanò, Rinaldo Castello
An Intuitive Analysis of Phase Noise Fundamental Limits Suitable for Benchmarking LC Oscillators. IEEE J. Solid State Circuits 49 (3) (2014)
Ivan Fabiano, Marco Sosio, Antonio Liscidini, Rinaldo Castello
SAW-Less Analog Front-End Receivers for TDD and FDD. IEEE J. Solid State Circuits 48 (12) (2013)
Ivan Fabiano, Marco Sosio, Antonio Liscidini, Rinaldo Castello
SAW-less analog front-end receivers for TDD and FDD. ISSCC (2013)
Marco Sosio, Antonio Liscidini, Rinaldo Castello
An Intuitive Current-Driven Passive Mixer Model Based on Switched-Capacitor Theory. IEEE Trans. Circuits Syst. II Express Briefs (2) (2013)
Paolo Rossi, Nicola Codega, Danilo Gerna, Antonio Liscidini, Daniele Ottini, Yong He, Alberto Pirola, Enrico Sacchi, Gregory Uehara, Chao Yang, Rinaldo Castello
An LTE transmitter using a class-A/B power mixer. ISSCC (2013)
Jody Greenberg, Fernando De Bernardinis, Carlo Tinella, Antonio Milani, Johnny Pan, Paola Uggetti, Marco Sosio, Shaoan Dai, S. E.-S. Tang, Giovanni Cesura, Gabriele Gandolfi, Vittorio Colonna, Rinaldo Castello
A 40-MHz-to-1-GHz Fully Integrated Multistandard Silicon Tuner in 80-nm CMOS. IEEE J. Solid State Circuits 48 (11) (2013)
Nicola Codega, Antonio Liscidini, Rinaldo Castello
A low out-of-band noise LTE transmitter with current-mode approach. ESSCIRC (2013)
Jody Greenberg, Fernando De Bernardinis, Carlo Tinella, Antonio Milani, Johnny Pan, Paola Uggetti, Marco Sosio, Shaoan Dai, Sam Tang, Giovanni Cesura, Gabriele Gandolfi, Vittorio Colonna, Rinaldo Castello
A 40MHz-to-1GHz fully integrated multistandard silicon tuner in 80nm CMOS. ISSCC (2012)
Antonio Liscidini, Luca Fanori, Pietro Andreani, Rinaldo Castello
A 36mW/9mW power-scalable DCO in 55nm CMOS for GSM/WCDMA frequency synthesizers. ISSCC (2012)
Luca Vercesi, Luca Fanori, Fernando De Bernardinis, Antonio Liscidini, Rinaldo Castello
A Dither-Less All Digital PLL for Cellular Transmitters. IEEE J. Solid State Circuits 47 (8) (2012)
Marco Sosio, Antonio Liscidini, Rinaldo Castello
A 2G/3G Cellular Analog Baseband Based on a Filtering ADC. IEEE Trans. Circuits Syst. II Express Briefs (4) (2012)
Luca Vercesi, Luca Fanori, Fernando De Bernardinis, Antonio Liscidini, Rinaldo Castello
A dither-less all digital PLL for cellular transmitters. CICC (2011)
Alberto Pirola, Antonio Liscidini, Rinaldo Castello
Corrections to "Current-Mode, WCDMA Channel Filter With In-Band Noise Shaping" [Sep 10 1770-1780]. IEEE J. Solid State Circuits 46 (2) (2011)
Marco Sosio, Antonio Liscidini, Rinaldo Castello, Fernando De Bernardinis
A complete DVB-T/ATSC tuner analog base-band implemented with a single filtering ADC. ESSCIRC (2011)
Luca Fanori, Antonio Liscidini, Rinaldo Castello
Capacitive Degeneration in LC-Tank Oscillator for DCO Fine-Frequency Tuning. IEEE J. Solid State Circuits 45 (12) (2010)
Luca Fanori, Antonio Liscidini, Rinaldo Castello
3.3GHz DCO with a frequency resolution of 150Hz for All-digital PLL. ISSCC (2010)
Alex Lollio, Giacomino Bollati, Rinaldo Castello
A Class-G Headphone Amplifier in 65 nm CMOS Technology. IEEE J. Solid State Circuits 45 (12) (2010)
Alberto Pirola, Antonio Liscidini, Rinaldo Castello
Current-Mode, WCDMA Channel Filter With In-Band Noise Shaping. IEEE J. Solid State Circuits 45 (9) (2010)
Alex Lollio, Giacomino Bollati, Rinaldo Castello
Class-G headphone driver in 65nm CMOS technology. ISSCC (2010)
Luca Vercesi, Antonio Liscidini, Rinaldo Castello
Two-Dimensions Vernier Time-to-Digital Converter. IEEE J. Solid State Circuits 45 (8) (2010)
Marika Tedeschi, Antonio Liscidini, Rinaldo Castello
Low-Power Quadrature Receivers for ZigBee (IEEE 802.15.4) Applications. IEEE J. Solid State Circuits 45 (9) (2010)
Giovanni Cesura, Alessandro Bosi, Francesco Rezzi, Rinaldo Castello, Jenkin Chan, SaiBun Wong, Chi Fan Yung, Ovidiu Carnu, Thomas Cho
A VDSL2 CPE AFE in 0.15µm CMOS with integrated line driver. ISSCC (2009)
Antonio Liscidini, Luca Vercesi, Rinaldo Castello
Time to digital converter based on a 2-dimensions Vernier architecture. CICC (2009)
Antonio Liscidini, Alberto Pirola, Rinaldo Castello
A 1.25mW 75dB-SFDR CT filter with in-band noise reduction. ISSCC (2009)
Danilo Manstretta, Nicola Laurenti, Rinaldo Castello
A Reconfigurable Narrow-Band MB-OFDM UWB Receiver Architecture. IEEE Trans. Circuits Syst. II Express Briefs (4) (2008)
Antonio Liscidini, Giuseppe Martini, Daniele Mastantuono, Rinaldo Castello
Analysis and Design of Configurable LNAs in Feedback Common-Gate Topologies. IEEE Trans. Circuits Syst. II Express Briefs (8) (2008)
Antonio Liscidini, Marika Tedeschi, Rinaldo Castello
Quadrature Front-End RX for ZigBee and WPAN Applications. ISSCC (2008)
Marika Tedeschi, Antonio Liscidini, Rinaldo Castello
A 0.23mm2 free coil ZigBee receiver based on a bond-wire self-oscillating mixer. ESSCIRC (2008)
Roberto G. Massolini, Giovanni Cesura, Rinaldo Castello
A fully digital fast convergence algorithm for nonlinearity correction in multistage ADC. IEEE Trans. Circuits Syst. II Express Briefs (5) (2006)
Antonio Liscidini, Cesare Ghezzi, Emanuele Depaoli, Guido Albasini, Ivan Bietti, Rinaldo Castello
Common Gate Transformer Feedback LNA in a High IIP3 Current Mode RF CMOS Front-End. CICC (2006)
Antonio Liscidini, Andrea Mazzanti, Riccardo Tonietto, Luca Vandi, Pietro Andreani, Rinaldo Castello
Single-Stage Low-Power Quadrature RF Receiver Front-End: The LMV Cell. IEEE J. Solid State Circuits 41 (12) (2006)
Antonio Liscidini, Massimo Brandolini, Davide Sanzogni, Rinaldo Castello
A 0.13 μm CMOS front-end, for DCS1800/UMTS/802.11b-g with multiband positive feedback low-noise amplifier. IEEE J. Solid State Circuits 41 (4) (2006)
Antonio Liscidini, Andrea Mazzanti, Riccardo Tonietto, Luca Vandi, Pietro Andreani, Rinaldo Castello
A 5.4mW GPS CMOS Quadrature Front-End Based on a Single-Stage LNA-Mixer-VCO. ISSCC (2006)
Mario Valla, Giampiero Montagna, Rinaldo Castello, Riccardo Tonietto, Ivan Bietti
A 72-mW CMOS 802.11a direct conversion front-end with 3.5-dB NF and 200-kHz 1/f noise corner. IEEE J. Solid State Circuits 40 (4) (2005)
Enrico Temporiti, Guido Albasini, Ivan Bietti, Rinaldo Castello, Matteo Colombo
A 700-kHz bandwidth ΣΔ fractional synthesizer with spurs compensation and linearization techniques for WCDMA applications. IEEE J. Solid State Circuits 39 (9) (2004)
Enrico Sacchi, Ivan Bietti, Simone Erbat, Luns Tee, Paolo Vilmercati, Rinaldo Castello
A 15 mW, 70 kHz 1/f corner direct conversion CMOS receiver. CICC (2003)
Ivan Bietti, Enrico Temporiti, Guido Albasini, Rinaldo Castello
An UMTS ΣΔ fractional synthesizer with 200 kHz bandwidth and -128 dBc/Hz @ 1 MHz using spurs compensation and linearization techniques. CICC (2003)
Giampiero Montagna, Giuseppe Gramegna, Ivan Bietti, Massimo Franciotta, Andrea Baschirotto, Placido De Vita, Roberto Pelleriti, Mario Paparo, Rinaldo Castello
A 35-mW 3.6-mm2 fully integrated 0.18-μm CMOS GPS radio. IEEE J. Solid State Circuits 38 (7) (2003)
Francesco Svelto, Stefano Deantoni, Giampiero Montagna, Rinaldo Castello
Implementation of a CMOS LNA plus mixer for GPS applications with no external components. IEEE Trans. Very Large Scale Integr. Syst. 9 (1) (2001)
Francesco Gatta, Enrico Sacchi, Francesco Svelto, Paolo Vilmercati, Rinaldo Castello
A 2-dB noise figure 900-MHz differential CMOS LNA. IEEE J. Solid State Circuits 36 (10) (2001)
Giacomino Bollati, Stefano Marchese, Marco Demicheli, Rinaldo Castello
An eighth-order CMOS low-pass filter with 30-120 MHz tuning range and programmable boost. IEEE J. Solid State Circuits 36 (7) (2001)
Andrea Baschirotto, F. Severi, Rinaldo Castello
A 200-Ms/s 10-mW switched-capacitor filter in 0.5-μm CMOS technology. IEEE J. Solid State Circuits 35 (8) (2000)
Andrea Baschirotto, Ugo Baschirotto, Rinaldo Castello
High-frequency CMOS low-power single-branch continuous-time filters. ISCAS (2000)
Francesco Svelto, Giampiero Montagna, Stefano Deantoni, Giulio Braschi, Rinaldo Castello
Solutions for image rejection CMOS LNA. ISCAS (2000)
Francesco Svelto, Stefano Deantoni, Giampiero Montagna, Rinaldo Castello
An 8mA, 3.8dB NF, 40dB gain CMOS front-end for GPS applications. ISLPED (2000)
Andrea Baschirotto, Domenico Bijno, Rinaldo Castello, Federico Montecchi
A 1 V 1.2 μW 4th order bandpass switched-opamp SC filter for a cardiac pacer sensing stage. ISCAS (2000)
Giacomino Bollati, Angelo Dati, Giorgio Betti, Ivan Bietti, Francesco Brianti, Melchiorre Bruccoleri, M. Coltella, P. Demartini, Marco Demicheli, Paolo Gadducci, Stefano Marchese, Daniele Ottini, Valerio Pisati, Francesco Rezzi, A. Rossi, P. Savo, C. Tonci, Rinaldo Castello
A 450 Mbit/s parallel read/write channel with parity check and 16-state time variant Viterbi. CICC (2000)
Francesco Svelto, Stefano Deantoni, Rinaldo Castello
A 1.3 GHz low-phase noise fully tunable CMOS LC VCO. IEEE J. Solid State Circuits 35 (3) (2000)
Francesco Svelto, Stefano Deantoni, Rinaldo Castello
A 1 mA, -120.5 dbc/Hz at 600 kHz from 1.9 GHz fully tuneable LC CMOS VCO. CICC (2000)
Francesco Svelto, Matteo Conta, Valentina Della Torre, Rinaldo Castello
A low-voltage topology for CMOS RF mixers. IEEE Trans. Consumer Electron. 45 (2) (1999)
Francesco Svelto, Stefano Deantoni, Rinaldo Castello
A 1.3 GHz CMOS VCO with 28% frequency tuning. CICC (1999)
Paolo Arcioni, Rinaldo Castello, Giuseppe De Astis, Enrico Sacchi, Francesco Svelto
Measurement and modeling of Si integrated inductors. IEEE Trans. Instrum. Meas. 47 (5) (1998)
Andrea Baschirotto, Rinaldo Castello, G. Pessina, Pier Giorgio Rancoita, A. Seidman
A versatile high-speed bipolar charge-sensitive preamplifier for calorimeter applications. IEEE J. Solid State Circuits 33 (4) (1998)
Roberto Alini, Giorgio Betti, Ivan Bietti, Giacomino Bollati, Francesco Brianti, Angelo Dati, Marco Demicheli, Paolo Gadducci, Stefano Marchese, Emanuele Marconetti, Valerio Pisati, Maurizio Zuffada, Rinaldo Castello, Fereidoon Heydari, Peter Gillen, Gerry Maguire, Marcus Marrow, Stephen McDonagh, Fergus O'Brien, Jerry O'Brien, Niall O'hEarcain, Deirdre Reddy, Lisa Fredrickson, Dennis Stone, LeRoy Volz
A 200-MSample/s trellis-coded PRML read/write channel with analog adaptive equalizer and digital servo. IEEE J. Solid State Circuits 32 (11) (1997)
Massimo Franciotta, G. Colli, Rinaldo Castello
A 100-MHz 4-mW four-quadrant BiCMOS analog multiplier. IEEE J. Solid State Circuits 32 (10) (1997)
Andrea Baschirotto, Rinaldo Castello
A 1-V 1.8-MHz CMOS switched-opamp SC filter with rail-to-rail output swing. IEEE J. Solid State Circuits 32 (11) (1997)
Francesco Rezzi, Ivan Bietti, Marco Cazzaniga, Rinaldo Castello
A 70-mW seventh-order filter with 7-50 MHz cutoff frequency and programmable boost and group delay equalization. IEEE J. Solid State Circuits 32 (11) (1997)
Luca Schillaci, Andrea Baschirotto, Rinaldo Castello
A 3-V 5.4-mW BiCMOS track & hold circuit with sampling frequency up to 150 MHz. IEEE J. Solid State Circuits 32 (7) (1997)
Angelo Nagari, Andrea Baschirotto, Federico Montecchi, Rinaldo Castello
A 10.7-MHz BiCMOS high-Q double-sampled SC bandpass filter. IEEE J. Solid State Circuits 32 (10) (1997)
Andrea Baschirotto, G. Boella, Rinaldo Castello, G. Pessina, P. G. Rancoita
A readout channel with 1 nF fully integrated capacitor for AMS space experiment. ICECS (1996)
Francesco Rezzi, Federico Montecchi, Rinaldo Castello
A PLL-based frequency synthesizer for 160-MHz double-sampled SC filters. IEEE J. Solid State Circuits 31 (10) (1996)
Maurizio Zuffada, Roberto Alini, Paolo Colletti, Marco Demicheli, Marco Gregori, David Moloney, Salvatore Portaluri, Fabrizio Sacchi, Sadik O. Arf, Vincent Condito, Rinaldo Castello
A single-chip 9-32 mb/s read/write channel for disk-drive applications. IEEE J. Solid State Circuits 30 (6) (1995)
Andrea Baschirotto, Federico Montecchi, Rinaldo Castello
A 15 MHz 20 mW BiCMOS switched-capacitor biquad operating with 150 Ms/s sampling frequency. IEEE J. Solid State Circuits 30 (12) (1995)

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Publication Activity (10 Years)

Top Topics

Top Venues

Rinaldo Castello