Davide De Caro

Publication Activity (10 Years)

Years Active: 2000-2024
Publications (10 Years): 35

Top Topics

Adaptive Filter

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Luca Tegazzini, Gennaro Di Meo, Davide De Caro, Antonio G. M. Strollo
Design of a Hardware-Efficient Floating-Point Multiplier with Dynamic Segmentation. PRIME (2024)
Fabrizio Ferrandi, Serena Curzel, Leandro Fiorin, Daniele Ielmini, Cristina Silvano, Francesco Conti, Alessio Burrello, Francesco Barchi, Luca Benini, Luciano Lavagno, Teodoro Urso, Enrico Calore, Sebastiano Fabio Schifano, Cristian Zambelli, Maurizio Palesi, Giuseppe Ascia, Enrico Russo, Nicola Petra, Davide De Caro, Gennaro Di Meo, Valeria Cardellini, Salvatore Filippone, Francesco Lo Presti, Francesco Silvestri, Paolo Palazzari, Stefania Perri
A Survey on Design Methodologies for Accelerating Deep Learning on Heterogeneous Architectures. CoRR (2023)
Cristina Silvano, Daniele Ielmini, Fabrizio Ferrandi, Leandro Fiorin, Serena Curzel, Luca Benini, Francesco Conti, Angelo Garofalo, Cristian Zambelli, Enrico Calore, Sebastiano Fabio Schifano, Maurizio Palesi, Giuseppe Ascia, Davide Patti, Stefania Perri, Nicola Petra, Davide De Caro, Luciano Lavagno, Teodoro Urso, Valeria Cardellini, Gian Carlo Cardarilli, Robert Birke
A Survey on Deep Learning Hardware Accelerators for Heterogeneous HPC Platforms. CoRR (2023)
Gennaro Di Meo, Antonio Giuseppe Maria Strollo, Davide De Caro
Novel Low-Power Floating-Point Divider With Linear Approximation and Minimum Mean Relative Error. IEEE Trans. Circuits Syst. I Regul. Pap. 70 (12) (2023)
Antonio Giuseppe Maria Strollo, Ettore Napoli, Davide De Caro, Nicola Petra, Giacinto Paolo Saggese, Gennaro Di Meo
Approximate Multipliers Using Static Segmentation: Error Analysis and Improvements. IEEE Trans. Circuits Syst. I Regul. Pap. 69 (6) (2022)
Gennaro Di Meo, Davide De Caro, Giacinto Paolo Saggese, Ettore Napoli, Nicola Petra, Antonio Giuseppe Maria Strollo
A Novel Module-Sign Low-Power Implementation for the DLMS Adaptive Filter With Low Steady-State Error. IEEE Trans. Circuits Syst. I Regul. Pap. 69 (1) (2022)
Gennaro Di Meo, Davide De Caro, Nicola Petra, Antonio G. M. Strollo
A novel low-power DLMS adaptive filter with sign-magnitude learning and approximated FIR section. PRIME (2022)
Gennaro Di Meo, Davide De Caro, Ettore Napoli, Nicola Petra, Antonio G. M. Strollo
Low-power Implementation of LMS Adaptive Filters Using Scalable Rounding. ICECS (2020)
Ettore Napoli, Davide De Caro, Nicola Petra, Antonio G. M. Strollo
A Binary Line Buffer Circuit Featuring Lossy Data Compression at Fixed Maximum Data Rate. ISCAS (2020)
Davide De Caro, Gennaro Di Meo, Ettore Napoli, Nicola Petra, Antonio Giuseppe Maria Strollo
A 1.45 GHz All-Digital Spread Spectrum Clock Generator in 65nm CMOS for Synchronization-Free SoC Applications. IEEE Trans. Circuits Syst. (11) (2020)
Antonio G. M. Strollo, Davide De Caro, Ettore Napoli, Nicola Petra, Gennaro Di Meo
Low-Power Approximate Multiplier with Error Recovery using a New Approximate 4-2 Compressor. ISCAS (2020)
Antonio Giuseppe Maria Strollo, Ettore Napoli, Davide De Caro, Nicola Petra, Gennaro Di Meo
Comparison and Extension of Approximate 4-2 Compressors for Low-Power Approximate Multipliers. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2020)
Ettore Napoli, Davide De Caro, Nicola Petra, Antonio Giuseppe Maria Strollo
A Binary Line Buffer Circuit Featuring Lossy Data Compression at Fixed Maximum Data Rate. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2020)
Darjn Esposito, Davide De Caro, Gennaro Di Meo, Ettore Napoli, Antonio G. M. Strollo
Low-Power Hardware Implementation of Least-Mean-Square Adaptive Filters Using Approximate Arithmetic. Circuits Syst. Signal Process. 38 (12) (2019)
Gerardo Castellano, Davide De Caro, Darjn Esposito, Paolo Bifulco, Ettore Napoli, Nicola Petra, Emilio Andreozzi, Mario Cesarelli, Antonio G. M. Strollo
An FPGA-Oriented Algorithm for Real-Time Filtering of Poisson Noise in Video Streams, with Application to X-Ray Fluoroscopy. Circuits Syst. Signal Process. 38 (7) (2019)
Gennaro Di Meo, Davide De Caro, Ettore Napoli, Nicola Petra, Antonio G. M. Strollo
Variable-Rounded LMS Filter for Low-Power Applications. ApplePies (2019)
Darjn Esposito, Gennaro Di Meo, Davide De Caro, Ettore Napoli, Nicola Petra, Antonio G. M. Strollo
Stall-Aware Fixed-Point Implementation of LMS Filters. PRIME (2018)
Darjn Esposito, Gennaro Di Meo, Davide De Caro, Nicola Petra, Ettore Napoli, Antonio G. M. Strollo
On the Use of Approximate Multipliers in LMS Adaptive Filters. ISCAS (2018)
Daniele Montanari, Gerardo Castellano, Ehsan Kargaran, Giacomo Pini, Saheed Tijani, Davide De Caro, Antonio Giuseppe Maria Strollo, Danilo Manstretta, Rinaldo Castello
An FDD Wireless Diversity Receiver With Transmitter Leakage Cancellation in Transmit and Receive Bands. IEEE J. Solid State Circuits 53 (7) (2018)
Darjn Esposito, Gennaro Di Meo, Davide De Caro, Antonio G. M. Strollo, Ettore Napoli
Quality-Scalable Approximate LMS Filter. ICECS (2018)
Darjn Esposito, Antonio Giuseppe Maria Strollo, Ettore Napoli, Davide De Caro, Nicola Petra
Approximate Multipliers Based on New Approximate Compressors. IEEE Trans. Circuits Syst. I Regul. Pap. (12) (2018)
Michele De Martino, Davide De Caro, Darjn Esposito, Ettore Napoli, Nicola Petra, Antonio Giuseppe Maria Strollo
A Standard-Cell-Based All-Digital PWM Modulator With High Resolution and Spread- Spectrum Capability. IEEE Trans. Circuits Syst. I Regul. Pap. (11) (2018)
Darjn Esposito, Gennaro Di Meo, Davide De Caro, Antonio G. M. Strollo, Ettore Napoli
Design of Low-Power Approximate LMS Filters with Precision-Scalability. ApplePies (2018)
Davide De Caro, Fabio Tessitore, Gianfranco Vai, Gerardo Castellano, Ettore Napoli, Nicola Petra, Claudio Parrella, Antonio G. M. Strollo
Single Flip-Flop Driving Circuit for Glitch-Free NAND-Based Digitally Controlled Delay-Lines. Circuits Syst. Signal Process. 36 (4) (2017)
Ettore Napoli, Gerardo Castellano, Davide De Caro, Darjn Esposito, Nicola Petra, Antonio Giuseppe Maria Strollo
Single Bit Filtering Circuit Implemented in a System for the Generation of Colored Noise. IEEE Trans. Circuits Syst. I Regul. Pap. (5) (2017)
Ettore Napoli, Gerardo Castellano, Davide De Caro, Darjn Esposito, Nicola Petra, Antonio G. M. Strollo
A SISO Register Circuit Tailored for Input Data with Low Transition Probability. IEEE Trans. Computers 66 (1) (2017)
Darjn Esposito, Davide De Caro, Ettore Napoli, Nicola Petra, Antonio G. M. Strollo
On the use of approximate adders in carry-save multiplier-accumulators. ISCAS (2017)
Gerardo Castellano, Daniele Montanari, Davide De Caro, Danilo Manstretta, Antonio Giuseppe Maria Strollo
An Efficient Digital Background Control for Hybrid Transformer-Based Receivers. IEEE Trans. Circuits Syst. I Regul. Pap. (12) (2017)
Davide De Caro, Ettore Napoli, Darjn Esposito, Gerardo Castellano, Nicola Petra, Antonio G. M. Strollo
Minimizing Coefficients Wordlength for Piecewise-Polynomial Hardware Function Evaluation With Exact or Faithful Rounding. IEEE Trans. Circuits Syst. I Regul. Pap. (5) (2017)
Darjn Esposito, Gerardo Castellano, Davide De Caro, Ettore Napoli, Nicola Petra, Antonio G. M. Strollo
Approximate adder with output correction for error tolerant applications and Gaussian distributed inputs. ISCAS (2016)
Gerardo Castellano, Davide De Caro, Antonio G. M. Strollo, Danilo Manstretta
A low power control system for real-time tuning of a hybrid transformer-based receiver. ICECS (2016)
Darjn Esposito, Davide De Caro, Antonio Giuseppe Maria Strollo
Variable Latency Speculative Parallel Prefix Adders for Unsigned and Signed Operands. IEEE Trans. Circuits Syst. I Regul. Pap. (8) (2016)
Darjn Esposito, Davide De Caro, Ettore Napoli, Nicola Petra, Antonio Giuseppe Maria Strollo
Variable Latency Speculative Han-Carlson Adder. IEEE Trans. Circuits Syst. I Regul. Pap. (5) (2015)
Mariangela Genovese, Paolo Bifulco, Davide De Caro, Ettore Napoli, Nicola Petra, Maria Romano, Mario Cesarelli, Antonio G. M. Strollo
Hardware implementation of a spatio-temporal average filter for real-time denoising of fluoroscopic images. Integr. 49 (2015)
Davide De Caro, Fabio Tessitore, Gianfranco Vai, Nicola Imperato, Nicola Petra, Ettore Napoli, Claudio Parrella, Antonio G. M. Strollo
A 3.3 GHz Spread-Spectrum Clock Generator Supporting Discontinuous Frequency Modulations in 28 nm CMOS. IEEE J. Solid State Circuits 50 (9) (2015)
Davide De Caro, Mariangela Genovese, Ettore Napoli, Nicola Petra, Antonio G. M. Strollo
Accurate Fixed-Point Logarithmic Converter. IEEE Trans. Circuits Syst. II Express Briefs (7) (2014)
Alessandro Cilardo, Davide De Caro, Nicola Petra, Francesco Caserta, Nicola Mazzocca, Ettore Napoli, Antonio Giuseppe Maria Strollo
High Speed Speculative Multipliers Based on Speculative Carry-Save Tree. IEEE Trans. Circuits Syst. I Regul. Pap. (12) (2014)
Mariangela Genovese, Ettore Napoli, Davide De Caro, Nicola Petra, Antonio G. M. Strollo
Analysis and comparison of Direct Digital Frequency Synthesizers implemented on FPGA. Integr. 47 (2) (2014)
Davide De Caro, Michele De Martino, Nicola Petra, Antonio G. M. Strollo
Analysis of Spread-Spectrum Clocking Modulations Under Synchronization Timing Constraint. ApplePies (2014)
Nicola Petra, Davide De Caro, Valeria Garofalo, Ettore Napoli, Antonio G. M. Strollo
Truncated squarer with minimum mean-square error. Microelectron. J. 45 (6) (2014)
Davide De Caro, Nicola Petra, Antonio Giuseppe Maria Strollo, Fabio Tessitore, Ettore Napoli
Fixed-Width Multipliers and Multipliers-Accumulators With Min-Max Approximation Error. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2013)
Davide De Caro
Glitch-Free NAND-Based Digitally Controlled Delay-Lines. IEEE Trans. Very Large Scale Integr. Syst. 21 (1) (2013)
Nicola Petra, Sebastiano Russo, Davide De Caro, Ettore Napoli, Giancarlo Barbarino, Antonio G. M. Strollo
NORA based TDC in 90 nm CMOS. Microelectron. J. 44 (6) (2013)
Mariangela Genovese, Ettore Napoli, Davide De Caro, Nicola Petra, Antonio G. M. Strollo
FPGA Implementation of Gaussian Mixture Model Algorithm for 47 fps Segmentation of 1080p Video. J. Electr. Comput. Eng. 2013 (2013)
M. Costagliola, Davide De Caro, Antonio Girardi, Roberto Izzi, Niccolò Rinaldi, M. Spirito, P. Spirito
An Experimental Power-Lines Model for Digital ASICs Based on Transmission Lines. IEEE Trans. Very Large Scale Integr. Syst. 20 (1) (2012)
Davide De Caro, Marino Coppola, Nicola Petra
A high-speed differential resistor ladder. Microelectron. J. 43 (6) (2012)
Tommaso Addabbo, Davide De Caro, Ada Fort, Nicola Petra, Santina Rocchi, Valerio Vignoli
Efficient implementation of pseudochaotic piecewise linear maps with high digitization accuracies. Int. J. Circuit Theory Appl. 40 (1) (2012)
Davide De Caro, Nicola Petra, Antonio G. M. Strollo
Efficient Logarithmic Converters for Digital Signal Processing Applications. IEEE Trans. Circuits Syst. II Express Briefs (10) (2011)
Antonio G. M. Strollo, Davide De Caro, Nicola Petra
Elementary Functions Hardware Implementation Using Constrained Piecewise-Polynomial Approximations. IEEE Trans. Computers 60 (3) (2011)
Nicola Petra, Davide De Caro, Valeria Garofalo, Ettore Napoli, Antonio G. M. Strollo
Design of Fixed-Width Multipliers With Linear Compensation Function. IEEE Trans. Circuits Syst. I Regul. Pap. (5) (2011)
Davide De Caro, Nicola Petra, Antonio G. M. Strollo
Direct Digital Frequency Synthesizer Using Nonuniform Piecewise-Linear Approximation. IEEE Trans. Circuits Syst. I Regul. Pap. (10) (2011)
Nicola Petra, Davide De Caro, Antonio G. M. Strollo, Valeria Garofalo, Ettore Napoli, Marino Coppola, Pietro Todisco
Fixed-width CSD multipliers with minimum mean square error. ISCAS (2010)
Davide De Caro, Marino Coppola, Nicola Petra, Ettore Napoli, Antonio G. M. Strollo, Valeria Garofalo
High-speed differential resistor ladder for A/D converters. ISCAS (2010)
Nicola Petra, Davide De Caro, Valeria Garofalo, Ettore Napoli, Antonio G. M. Strollo
Truncated Binary Multipliers With Variable Correction and Minimum Mean Square Error. IEEE Trans. Circuits Syst. I Regul. Pap. (6) (2010)
Valeria Garofalo, Marino Coppola, Davide De Caro, Ettore Napoli, Nicola Petra, Antonio G. M. Strollo
A novel truncated squarer with linear compensation function. ISCAS (2010)
Davide De Caro, Carlo Alberto Romani, Nicola Petra, Antonio G. M. Strollo, Claudio Parrella
A 1.27 GHz, All-Digital Spread Spectrum Clock Generator/Synthesizer in 65 nm CMOS. IEEE J. Solid State Circuits 45 (5) (2010)
Davide De Caro, Nicola Petra, Antonio G. M. Strollo
High-Performance Special Function Unit for Programmable 3-D Graphics Processors. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2009)
Davide De Caro, Nicola Petra, Antonio G. M. Strollo
Digital Synthesizer/Mixer With Hybrid CORDIC-Multiplier Architecture: Error Analysis and Optimization. IEEE Trans. Circuits Syst. I Regul. Pap. (2) (2009)
Davide De Caro, Nicola Petra, Antonio G. M. Strollo
A high performance floating-point special function unit using constrained piecewise quadratic approximation. ISCAS (2008)
Valeria Garofalo, Nicola Petra, Davide De Caro, Antonio G. M. Strollo, Ettore Napoli
Low error truncated multipliers for DSP applications. ICECS (2008)
Antonio G. M. Strollo, Davide De Caro, Nicola Petra, Ettore Napoli, Valeria Garofalo
Constrained piecewise polinomial approximation for hardware implementation of elementary functions. ICECS (2008)
Andrea Bonfanti, Davide De Caro, Alfio Dario Grasso, Salvatore Pennisi, Carlo Samori, Antonio G. M. Strollo
A 2.5-GHz DDFS-PLL With 1.8-MHz Bandwidth in 0.35-µm CMOS. IEEE J. Solid State Circuits 43 (6) (2008)
Antonio Giuseppe Maria Strollo, Davide De Caro, Nicola Petra
A 430 MHz, 280 mW Processor for the Conversion of Cartesian to Polar Coordinates in 0.25 µm CMOS. IEEE J. Solid State Circuits 43 (11) (2008)
Davide De Caro, Nicola Petra, Antonio G. M. Strollo
Reducing Lookup-Table Size in Direct Digital Frequency Synthesizers Using Optimized Multipartite Table Method. IEEE Trans. Circuits Syst. I Regul. Pap. (7) (2008)
Nicola Petra, Davide De Caro, Antonio G. M. Strollo
) Multipliers. ECCTD (2007)
Nicola Petra, Davide De Caro, Antonio G. M. Strollo
A Novel Architecture for Galois Fields GF(2^m) Multipliers Based on Mastrovito Scheme. IEEE Trans. Computers 56 (11) (2007)
Antonio Giuseppe Maria Strollo, Davide De Caro, Nicola Petra
A 630 MHz, 76 mW Direct Digital Frequency Synthesizer Using Enhanced ROM Compression Technique. IEEE J. Solid State Circuits 42 (2) (2007)
Nicola Petra, Davide De Caro, Antonio G. M. Strollo
Design of fixed-width multipliers with minimum mean square error. ECCTD (2007)
Davide De Caro, Nicola Petra, Antonio Giuseppe Maria Strollo
A 380 MHz Direct Digital Synthesizer/Mixer With Hybrid CORDIC Architecture in 0.25 µm CMOS. IEEE J. Solid State Circuits 42 (1) (2007)
Davide De Caro, Nicola Petra, Antonio G. M. Strollo
A 380MHz, 150mW direct digital synthesizer/mixer in 0.25µm CMOS. ISSCC (2006)
Davide De Caro, Nicola Petra, Antonio G. M. Strollo
A 630MHz direct digital frequency synthesizer with 90dBc SFDR in 0.25µm CMOS. ISSCC (2006)
Davide De Caro, Antonio G. M. Strollo
High-performance direct digital frequency synthesizers using piecewise-polynomial approximation. IEEE Trans. Circuits Syst. I Regul. Pap. (2) (2005)
Antonio G. M. Strollo, Nicola Petra, Davide De Caro
Dual-Tree Error Compensation for High Performance Fixed-Width Multipliers. IEEE Trans. Circuits Syst. II Express Briefs (8) (2005)
Davide De Caro, Ettore Napoli, Nicola Petra, Antonio G. M. Strollo
A high-speed sense-amplifier based flip-flop. ECCTD (2005)
Davide De Caro, Antonio Giuseppe Maria Strollo
High-performance direct digital frequency synthesizers in 0.25 /spl mu/m CMOS using dual-slope approximation. IEEE J. Solid State Circuits 40 (11) (2005)
Antonio G. M. Strollo, Davide De Caro, Ettore Napoli, Nicola Petra
A novel high-speed sense-amplifier-based flip-flop. IEEE Trans. Very Large Scale Integr. Syst. 13 (11) (2005)
Antonio Giuseppe Maria Strollo, Nicola Petra, Davide De Caro, Ettore Napoli
An area-efficient high-speed Reed-Solomon decoder in 0.25 μm CMOS. ESSCIRC (2004)
Antonio G. M. Strollo, Davide De Caro, Ettore Napoli, Nicola Petra
High-speed direct digital frequency synthesizers in 0.25-μm CMOS. CICC (2004)
Davide De Caro, Ettore Napoli, Antonio G. M. Strollo
Direct digital frequency synthesizers with polynomial hyperfolding technique. IEEE Trans. Circuits Syst. II Express Briefs (7) (2004)
Antonio Giuseppe Maria Strollo, Davide De Caro, Ettore Napoli, Nicola Petra
Direct digital frequency synthesis with dual-slope approach. ESSCIRC (2003)
Antonio G. M. Strollo, Davide De Caro
Booth folding encoding for high performance squarer circuits. IEEE Trans. Circuits Syst. II Express Briefs 50 (5) (2003)
Antonio G. M. Strollo, Davide De Caro
Direct digital frequency synthesizers exploiting piecewise linear Chebyshev approximation. Microelectron. J. 34 (11) (2003)
Davide De Caro, Ettore Napoli, Antonio G. M. Strollo
ROM-less direct digital frequency synthesizers exploiting polynomial approximation. ICECS (2002)
Giacinto Paolo Saggese, Antonio G. M. Strollo, Nicola Mazzocca, Davide De Caro
Shuffled serial adder: an area-latency effective serial adder. ICECS (2002)
Antonio G. M. Strollo, Ettore Napoli, Davide De Caro, Giacinto Paolo Saggese
A reconfigurable 2D convolver for real-time SAR imaging. ICECS (2001)
Antonio G. M. Strollo, Ettore Napoli, Davide De Caro
New design of squarer circuits using Booth encoding and folding techniques. ICECS (2001)
Davide De Caro, Nicola Mazzocca, Ettore Napoli, Giacinto Paolo Saggese, Antonio G. M. Strollo
Test pattern generator for hybrid testing of combinational circuits. ICECS (2001)
Antonio G. M. Strollo, Ettore Napoli, Davide De Caro
New clock-gating techniques for low-power flip-flops. ISLPED (2000)