Antonio Giuseppe Maria Strollo

Publication Activity (10 Years)

Years Active: 2003-2023
Publications (10 Years): 18

Top Topics

Video Watermarking

Adaptive Filter

Error Compensation

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

IEEE Trans. Circuits Syst.

Publications

Gennaro Di Meo, Antonio Giuseppe Maria Strollo, Davide De Caro
Novel Low-Power Floating-Point Divider With Linear Approximation and Minimum Mean Relative Error. IEEE Trans. Circuits Syst. I Regul. Pap. 70 (12) (2023)
Gerardo Saggese, Ettore Napoli, Antonio Giuseppe Maria Strollo
CFPM: Run-time Configurable Floating-Point Multiplier. PRIME (2023)
Gerardo Saggese, Efstratios Zacharelos, Antonio Giuseppe Maria Strollo
Low Power Spike Detector for Brain-Silicon Interface using Differential Amplitude Slope Operator. PRIME (2022)
Antonio Giuseppe Maria Strollo, Ettore Napoli, Davide De Caro, Nicola Petra, Giacinto Paolo Saggese, Gennaro Di Meo
Approximate Multipliers Using Static Segmentation: Error Analysis and Improvements. IEEE Trans. Circuits Syst. I Regul. Pap. 69 (6) (2022)
Mauro D'Arco, Ettore Napoli, Efstratios Zacharelos, Leopoldo Angrisani, Antonio Giuseppe Maria Strollo
Enabling Fine Sample Rate Settings in DSOs with Time-Interleaved ADCs. Sensors 22 (1) (2022)
Italo Nunziata, Efstratios Zacharelos, Gerardo Saggese, Antonio Giuseppe Maria Strollo, Ettore Napoli
Approximate Recursive Multipliers Using Carry Truncation and Error Compensation. PRIME (2022)
Gennaro Di Meo, Davide De Caro, Giacinto Paolo Saggese, Ettore Napoli, Nicola Petra, Antonio Giuseppe Maria Strollo
A Novel Module-Sign Low-Power Implementation for the DLMS Adaptive Filter With Low Steady-State Error. IEEE Trans. Circuits Syst. I Regul. Pap. 69 (1) (2022)
Ettore Napoli, Efstratios Zacharelos, Mauro D'Arco, Antonio Giuseppe Maria Strollo
Real-Time Downsampling in Digital Storage Oscilloscopes With Multichannel Architectures. IEEE Trans. Circuits Syst. I Regul. Pap. 68 (10) (2021)
Davide De Caro, Gennaro Di Meo, Ettore Napoli, Nicola Petra, Antonio Giuseppe Maria Strollo
A 1.45 GHz All-Digital Spread Spectrum Clock Generator in 65nm CMOS for Synchronization-Free SoC Applications. IEEE Trans. Circuits Syst. (11) (2020)
Antonio Giuseppe Maria Strollo, Ettore Napoli, Davide De Caro, Nicola Petra, Gennaro Di Meo
Comparison and Extension of Approximate 4-2 Compressors for Low-Power Approximate Multipliers. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2020)
Ettore Napoli, Davide De Caro, Nicola Petra, Antonio Giuseppe Maria Strollo
A Binary Line Buffer Circuit Featuring Lossy Data Compression at Fixed Maximum Data Rate. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2020)
Daniele Montanari, Gerardo Castellano, Ehsan Kargaran, Giacomo Pini, Saheed Tijani, Davide De Caro, Antonio Giuseppe Maria Strollo, Danilo Manstretta, Rinaldo Castello
An FDD Wireless Diversity Receiver With Transmitter Leakage Cancellation in Transmit and Receive Bands. IEEE J. Solid State Circuits 53 (7) (2018)
Darjn Esposito, Antonio Giuseppe Maria Strollo, Ettore Napoli, Davide De Caro, Nicola Petra
Approximate Multipliers Based on New Approximate Compressors. IEEE Trans. Circuits Syst. I Regul. Pap. (12) (2018)
Michele De Martino, Davide De Caro, Darjn Esposito, Ettore Napoli, Nicola Petra, Antonio Giuseppe Maria Strollo
A Standard-Cell-Based All-Digital PWM Modulator With High Resolution and Spread- Spectrum Capability. IEEE Trans. Circuits Syst. I Regul. Pap. (11) (2018)
Ettore Napoli, Gerardo Castellano, Davide De Caro, Darjn Esposito, Nicola Petra, Antonio Giuseppe Maria Strollo
Single Bit Filtering Circuit Implemented in a System for the Generation of Colored Noise. IEEE Trans. Circuits Syst. I Regul. Pap. (5) (2017)
Gerardo Castellano, Daniele Montanari, Davide De Caro, Danilo Manstretta, Antonio Giuseppe Maria Strollo
An Efficient Digital Background Control for Hybrid Transformer-Based Receivers. IEEE Trans. Circuits Syst. I Regul. Pap. (12) (2017)
Darjn Esposito, Davide De Caro, Antonio Giuseppe Maria Strollo
Variable Latency Speculative Parallel Prefix Adders for Unsigned and Signed Operands. IEEE Trans. Circuits Syst. I Regul. Pap. (8) (2016)
Darjn Esposito, Davide De Caro, Ettore Napoli, Nicola Petra, Antonio Giuseppe Maria Strollo
Variable Latency Speculative Han-Carlson Adder. IEEE Trans. Circuits Syst. I Regul. Pap. (5) (2015)
Alessandro Cilardo, Davide De Caro, Nicola Petra, Francesco Caserta, Nicola Mazzocca, Ettore Napoli, Antonio Giuseppe Maria Strollo
High Speed Speculative Multipliers Based on Speculative Carry-Save Tree. IEEE Trans. Circuits Syst. I Regul. Pap. (12) (2014)
Davide De Caro, Nicola Petra, Antonio Giuseppe Maria Strollo, Fabio Tessitore, Ettore Napoli
Fixed-Width Multipliers and Multipliers-Accumulators With Min-Max Approximation Error. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2013)
Antonio Giuseppe Maria Strollo, Davide De Caro, Nicola Petra
A 430 MHz, 280 mW Processor for the Conversion of Cartesian to Polar Coordinates in 0.25 µm CMOS. IEEE J. Solid State Circuits 43 (11) (2008)
Antonio Giuseppe Maria Strollo, Davide De Caro, Nicola Petra
A 630 MHz, 76 mW Direct Digital Frequency Synthesizer Using Enhanced ROM Compression Technique. IEEE J. Solid State Circuits 42 (2) (2007)
Valeria Garofalo, Ettore Napoli, Nicola Petra, Antonio Giuseppe Maria Strollo
Code compression for ARM7 embedded systems. ECCTD (2007)
Davide De Caro, Nicola Petra, Antonio Giuseppe Maria Strollo
A 380 MHz Direct Digital Synthesizer/Mixer With Hybrid CORDIC Architecture in 0.25 µm CMOS. IEEE J. Solid State Circuits 42 (1) (2007)
Davide De Caro, Antonio Giuseppe Maria Strollo
High-performance direct digital frequency synthesizers in 0.25 /spl mu/m CMOS using dual-slope approximation. IEEE J. Solid State Circuits 40 (11) (2005)
Antonio Giuseppe Maria Strollo, Nicola Petra, Davide De Caro, Ettore Napoli
An area-efficient high-speed Reed-Solomon decoder in 0.25 μm CMOS. ESSCIRC (2004)
Antonio Giuseppe Maria Strollo, Davide De Caro, Ettore Napoli, Nicola Petra
Direct digital frequency synthesis with dual-slope approach. ESSCIRC (2003)