Melchiorre Bruccoleri

Publication Activity (10 Years)

Years Active: 2000-2024
Publications (10 Years): 6

Top Topics

Top Venues

IEEE J. Solid State Circuits

Publications

Guglielmo De Filippi, Lorenzo Piotto, Melchiorre Bruccoleri, Andrea Mazzanti
A 170GHz 5.5dB NF Low-Noise Amplifier in 55nm SiGe BiCMOS. PRIME (2024)
Farhad Bozorgi, Melchiorre Bruccoleri, Elham Rahimi, Matteo Repossi, Francesco Svelto, Andrea Mazzanti
Analog Front End of 50-Gb/s SiGe BiCMOS Opto-Electrical Receiver in 3-D-Integrated Silicon Photonics Technology. IEEE J. Solid State Circuits 57 (1) (2022)
Farhad Bozorgi, Melchiorre Bruccoleri, Matteo Repossi, Enrico Temporiti, Andrea Mazzanti, Francesco Svelto
A 26-Gb/s 3-D-Integrated Silicon Photonic Receiver in BiCMOS-55 nm and PIC25G With - 15.2-dBm OMA Sensitivity. ESSCIRC (2019)
Matteo Bassi, Francesco Radice, Melchiorre Bruccoleri, Simone Erba, Andrea Mazzanti
3.6 A 45Gb/s PAM-4 transmitter delivering 1.3Vppd output swing with 1V supply in 28nm CMOS FDSOI. ISSCC (2016)
Matteo Bassi, Francesco Radice, Melchiorre Bruccoleri, Simone Erba, Andrea Mazzanti
A High-Swing 45 Gb/s Hybrid Voltage and Current-Mode PAM-4 Transmitter in 28 nm CMOS FDSOI. IEEE J. Solid State Circuits 51 (11) (2016)
Francesco Radice, Melchiorre Bruccoleri, Enrico Mammei, Matteo Bassi, Andrea Mazzanti
A low-noise programmable-gain amplifier for 25 Gb/s multi-mode fiber receivers in 28nm CMOS FDSOI. ESSCIRC (2015)
Enrico Mammei, Fabrizio Loi, Francesco Radice, Angelo Dati, Melchiorre Bruccoleri, Matteo Bassi, Andrea Mazzanti
8.3 A power-scalable 7-tap FIR equalizer with tunable active delay line for 10-to-25Gb/s multi-mode fiber EDC in 28nm LP-CMOS. ISSCC (2014)
Enrico Mammei, Fabrizio Loi, Francesco Radice, Angelo Dati, Melchiorre Bruccoleri, Matteo Bassi, Andrea Mazzanti
Analysis and Design of a Power-Scalable Continuous-Time FIR Equalizer for 10 Gb/s to 25 Gb/s Multi-Mode Fiber EDC in 28 nm LP CMOS. IEEE J. Solid State Circuits 49 (12) (2014)
Francesco Radice, Melchiorre Bruccoleri, Marcello Ganzerli, Giorgio Spelgatti, Davide Sanzogni, Massimo Pozzoni, Andrea Mazzanti
A 6-bit 6-GS/s 95mW background calibrated flash ADC with integrating preamplifiers and half-rate comparators in 32nm LP CMOS. ESSCIRC (2013)
Andrea Xotta, Daniele Vogrig, Andrea Gerosa, Andrea Neviani, Alexandre Graell i Amat, Guido Montorsi, Melchiorre Bruccoleri, G. Betti
An all-analog CMOS implementation of a turbo decoder for hard-disk drive read channels. ISCAS (5) (2002)
Giacomino Bollati, Angelo Dati, Giorgio Betti, Ivan Bietti, Francesco Brianti, Melchiorre Bruccoleri, M. Coltella, P. Demartini, Marco Demicheli, Paolo Gadducci, Stefano Marchese, Daniele Ottini, Valerio Pisati, Francesco Rezzi, A. Rossi, P. Savo, C. Tonci, Rinaldo Castello
A 450 Mbit/s parallel read/write channel with parity check and 16-state time variant Viterbi. CICC (2000)