Davide Sanzogni

Publication Activity (10 Years)

Years Active: 2006-2013
Publications (10 Years): 0

Top Topics

High Definition

Top Venues

Publications

Francesco Radice, Melchiorre Bruccoleri, Marcello Ganzerli, Giorgio Spelgatti, Davide Sanzogni, Massimo Pozzoni, Andrea Mazzanti
A 6-bit 6-GS/s 95mW background calibrated flash ADC with integrating preamplifiers and half-rate comparators in 32nm LP CMOS. ESSCIRC (2013)
Marcello Ganzerli, Luca Larcher, Simone Erba, Davide Sanzogni
An inductor-less 13.5-Gbps 8-mW analog equalizer for multi-channel multi-frequency operation. ISCAS (2011)
Massimo Pozzoni, Simone Erba, Davide Sanzogni, Marcello Ganzerli, Paolo Viola, Daniele Baldi, Matteo Repossi, Giorgio Spelgatti, Francesco Svelto
A 12Gb/s 39dB loss-recovery unclocked-DFE receiver with bi-dimensional equalization. ISSCC (2010)
Massimo Pozzoni, Simone Erba, Paolo Viola, Matteo Pisati, Emanuele Depaoli, Davide Sanzogni, Riccardo Brama, Daniele Baldi, Matteo Repossi, Francesco Svelto
A Multi-Standard 1.5 to 10 Gb/s Latch-Based 3-Tap DFE Receiver With a SSC Tolerant CDR for Serial Backplane Communication. IEEE J. Solid State Circuits 44 (4) (2009)
Simone Erba, Massimo Pozzoni, Matteo Pisati, Riccardo Brama, Davide Sanzogni, Emanuele Depaoli, Paolo Viola, Francesco Svelto
A 10Gb/s receiver with linear backplane equalization and mixer-based self-aligned CDR. CICC (2008)
Antonio Liscidini, Massimo Brandolini, Davide Sanzogni, Rinaldo Castello
A 0.13 μm CMOS front-end, for DCS1800/UMTS/802.11b-g with multiband positive feedback low-noise amplifier. IEEE J. Solid State Circuits 41 (4) (2006)
Massimo Brandolini, Paolo Rossi, Davide Sanzogni, Francesco Svelto
A +78 dBm IIP2 CMOS direct downconversion mixer for fully integrated UMTS receivers. IEEE J. Solid State Circuits 41 (3) (2006)